Preparative chromatography / / edited by H. Schmidt-Traub, Michael Schulte, Andreas Seidel-Morgenstern |
Pubbl/distr/stampa | Weinheim, Germany : , : Wiley-VCH, , [2020] |
Descrizione fisica | 1 online resource (651 pages) |
Disciplina | 543.8 |
Soggetto topico | Preparative layer chromatography |
Soggetto genere / forma | Electronic books. |
ISBN |
3-527-81633-X
3-527-81634-8 3-527-81631-3 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910555159403321 |
Weinheim, Germany : , : Wiley-VCH, , [2020] | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Preparative chromatography / / edited by H. Schmidt-Traub, Michael Schulte, Andreas Seidel-Morgenstern |
Pubbl/distr/stampa | Weinheim, Germany : , : Wiley-VCH, , [2020] |
Descrizione fisica | 1 online resource (651 pages) |
Disciplina | 543.8 |
Soggetto topico | Preparative layer chromatography |
ISBN |
3-527-81633-X
3-527-81634-8 3-527-81631-3 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910830500603321 |
Weinheim, Germany : , : Wiley-VCH, , [2020] | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte |
Edizione | [1st ed. 2019.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 |
Descrizione fisica | 1 online resource (IX, 141 p. 88 illus., 36 illus. in color.) |
Disciplina | 004.3 |
Collana | Transactions on High-Performance Embedded Architectures and Compilers |
Soggetto topico |
Arithmetic and logic units, Computer
Microprogramming Logic design Architecture, Computer Operating systems (Computers) Programming languages (Electronic computers) Arithmetic and Logic Structures Control Structures and Microprogramming Logic Design Computer System Implementation Operating Systems Programming Languages, Compilers, Interpreters |
ISBN | 3-662-58834-X |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. |
Record Nr. | UNINA-9910337583703321 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte |
Edizione | [1st ed. 2019.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 |
Descrizione fisica | 1 online resource (IX, 141 p. 88 illus., 36 illus. in color.) |
Disciplina | 004.3 |
Collana | Transactions on High-Performance Embedded Architectures and Compilers |
Soggetto topico |
Arithmetic and logic units, Computer
Microprogramming Logic design Architecture, Computer Operating systems (Computers) Programming languages (Electronic computers) Arithmetic and Logic Structures Control Structures and Microprogramming Logic Design Computer System Implementation Operating Systems Programming Languages, Compilers, Interpreters |
ISBN | 3-662-58834-X |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. |
Record Nr. | UNISA-996466429403316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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