Architecture of Computing Systems – ARCS 2019 [[electronic resource] ] : 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings / / edited by Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck |
Edizione | [1st ed. 2019.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 |
Descrizione fisica | 1 online resource (XIX, 335 p. 212 illus., 88 illus. in color.) |
Disciplina | 004.22 |
Collana | Theoretical Computer Science and General Issues |
Soggetto topico |
Computer networks
Operating systems (Computers) Logic design Computer systems Computer input-output equipment Microprocessors Computer architecture Computer Communication Networks Operating Systems Logic Design Computer System Implementation Input/Output and Data Communications Processor Architectures |
ISBN | 3-030-18656-3 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Dependable Systems -- Hardware/Software Co-designed Security Extensions for Embedded Devices -- SDES - Scalable Software Support for Dependable Embedded Systems -- Real-Time Systems -- Asynchronous Critical Sections in Real-Time Multiprocessor Systems -- Resource-Aware Parameter Tuning for Real-Time Applications -- A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC -- Special Applications -- DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs -- Applying the Concept of Artificial DNA and Hormone System to a Low-Performance Automotive Environment -- A Parallel Adaptive Swarm Search Framework for Solving Black-Box Optimization Problems -- Architecture -- Leros: the Return of the Accumulator Machine -- A Generic Functional Simulation of Heterogeneous Systems -- Evaluating Dynamic Task Scheduling in a Task-based Runtime System for Heterogeneous Architectures -- Dynamic Scheduling of Pipelined Functional Units in Coarse-Grained Reconfigurable Array Elements -- Memory Hierarchy -- CyPhOS { A Component-based Cache-Aware Multi-Core Operating System -- Investigation of L2-Cache interferences in a NXP QorIQ T4240 multicore processor -- MEMPower: Data-Aware GPU Memory Power Model -- FPGA -- Effective FPGA Architecture for General CRC -- Receive-Side Notification for Enhanced RDMA in FPGA Based Networks -- An Efficient FPGA Accelerator Design for Optimized CNNs using OpenCL -- Energy Awareness -- The Return of Power Gating: Smart Leakage Energy Reductions in Modern Out-of-Order Processor Architectures -- A Heterogeneous and Reconfigurable Embedded Architecture for Energy-efficient Execution of Convolutional Neural Networks -- An energy efficient embedded processor for hard real-time Java applications -- NoC/SoC -- A Minimal Network Interface for a Simple Network-on-Chip -- Network Coding in Networks-on-Chip with Lossy Links -- Application Specific Reconfigurable SoC Interconnection Network Architectures. |
Record Nr. | UNISA-996466197103316 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 | ||
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Lo trovi qui: Univ. di Salerno | ||
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Architecture of Computing Systems – ARCS 2019 : 32nd International Conference, Copenhagen, Denmark, May 20–23, 2019, Proceedings / / edited by Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck |
Edizione | [1st ed. 2019.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 |
Descrizione fisica | 1 online resource (XIX, 335 p. 212 illus., 88 illus. in color.) |
Disciplina | 004.22 |
Collana | Theoretical Computer Science and General Issues |
Soggetto topico |
Computer networks
Operating systems (Computers) Logic design Computer systems Computer input-output equipment Microprocessors Computer architecture Computer Communication Networks Operating Systems Logic Design Computer System Implementation Input/Output and Data Communications Processor Architectures |
ISBN | 3-030-18656-3 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Dependable Systems -- Hardware/Software Co-designed Security Extensions for Embedded Devices -- SDES - Scalable Software Support for Dependable Embedded Systems -- Real-Time Systems -- Asynchronous Critical Sections in Real-Time Multiprocessor Systems -- Resource-Aware Parameter Tuning for Real-Time Applications -- A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC -- Special Applications -- DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs -- Applying the Concept of Artificial DNA and Hormone System to a Low-Performance Automotive Environment -- A Parallel Adaptive Swarm Search Framework for Solving Black-Box Optimization Problems -- Architecture -- Leros: the Return of the Accumulator Machine -- A Generic Functional Simulation of Heterogeneous Systems -- Evaluating Dynamic Task Scheduling in a Task-based Runtime System for Heterogeneous Architectures -- Dynamic Scheduling of Pipelined Functional Units in Coarse-Grained Reconfigurable Array Elements -- Memory Hierarchy -- CyPhOS { A Component-based Cache-Aware Multi-Core Operating System -- Investigation of L2-Cache interferences in a NXP QorIQ T4240 multicore processor -- MEMPower: Data-Aware GPU Memory Power Model -- FPGA -- Effective FPGA Architecture for General CRC -- Receive-Side Notification for Enhanced RDMA in FPGA Based Networks -- An Efficient FPGA Accelerator Design for Optimized CNNs using OpenCL -- Energy Awareness -- The Return of Power Gating: Smart Leakage Energy Reductions in Modern Out-of-Order Processor Architectures -- A Heterogeneous and Reconfigurable Embedded Architecture for Energy-efficient Execution of Convolutional Neural Networks -- An energy efficient embedded processor for hard real-time Java applications -- NoC/SoC -- A Minimal Network Interface for a Simple Network-on-Chip -- Network Coding in Networks-on-Chip with Lossy Links -- Application Specific Reconfigurable SoC Interconnection Network Architectures. |
Record Nr. | UNINA-9910337841203321 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 | ||
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Lo trovi qui: Univ. Federico II | ||
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JTRES 2007 : proceedings of the 5th International Workshop on Java Technologies for Real-Time and Embedded Systems : Institute of Computer Engineering, Vienna University of Technology, 26-28 September 2007, Vienna, Austria |
Autore | Bollella Greg |
Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2007 |
Descrizione fisica | 1 online resource (237 pages) |
Collana | ACM Conferences |
Soggetto topico |
Engineering & Applied Sciences
Computer Science |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti |
Java Technologies for Real-Time and Embedded Systems 2007
Proceedings of the 5th International Workshop on Java Technologies for Real-Time and Embedded Systems JTRES '07 |
Record Nr. | UNINA-9910376399303321 |
Bollella Greg
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[Place of publication not identified], : ACM, 2007 | ||
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Lo trovi qui: Univ. Federico II | ||
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JTRES 2012 : proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems : 24-26 October 2012, Copenhagen, Denmark |
Autore | Wellings Andy |
Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2012 |
Descrizione fisica | 1 online resource (199 pages) |
Collana | ACM Other conferences |
Soggetto topico |
Engineering & Applied Sciences
Computer Science |
ISBN | 1-4503-1688-3 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti |
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
JTRES '12 the 10th International Workshop on Java Technologies for Real-time and Embedded Systems, Copenhagen, Denmark - October 24 - 26, 2012 |
Record Nr. | UNINA-9910376331503321 |
Wellings Andy
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[Place of publication not identified], : ACM, 2012 | ||
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Lo trovi qui: Univ. Federico II | ||
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JTRES 2016 : proceedings of the 14th International Workshop on Java Technologies for Real-Time and Embedded Systems : August 29-September 2, 2016, Lugano, Switzerland / / workshop chair, Walter Binder : program chair, Martin Schoeberl |
Pubbl/distr/stampa | New York : , : ACM, , 2016 |
Descrizione fisica | 1 online resource (56 pages) |
Disciplina | 005.133 |
Collana | ACM International Conference Proceeding Series |
Soggetto topico |
Java (Computer program language)
Real-time programming Embedded computer systems |
ISBN | 1-4503-4800-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti |
Java Technologies for Real-Time and Embedded Systems 2016
Proceedings of the 14th International Workshop on Java Technologies for Real-Time and Embedded Systems |
Record Nr. | UNINA-9910376444403321 |
New York : , : ACM, , 2016 | ||
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Lo trovi qui: Univ. Federico II | ||
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