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Data Parallel C++ : Programming Accelerated Systems Using C++ and SYCL / / by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian
| Data Parallel C++ : Programming Accelerated Systems Using C++ and SYCL / / by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian |
| Autore | Reinders James |
| Edizione | [2nd ed. 2023.] |
| Pubbl/distr/stampa | Berkeley, CA : , : Apress : , : Imprint : Apress, , 2023 |
| Descrizione fisica | 1 online resource (XXX, 630 p. 329 illus., 294 illus. in color.) |
| Disciplina | 005.45 |
| Soggetto topico |
Compilers (Computer programs)
Makerspaces Compilers and Interpreters Maker |
| ISBN | 1-4842-9691-5 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1: Introduction -- Chapter 2: Where Code Executes -- Chapter 3: Data Management and Ordering the Uses of Data -- Chapter 4: Expressing Parallelism -- Chapter 5: Error Handling -- Chapter 6: Unified Shared Memory -- Chapter 7: Buffers -- Chapter 8: Scheduling Kernels and Data Movement -- Chapter 9: Local Memory and Work-group Barriers -- Chapter 10: Defining Kernels -- Chapter 11: Vector and Math Arrays -- Chapter 12: Device Information and Kernel Specialization -- Chapter 13: Practical Tips -- Chapter 14: Common Parallel Patterns -- Chapter 15: Programming for GPUs -- Chapter 16: Programming for CPUs -- Chapter 17: Programming for FFGAs -- Chapter 18: Libraries -- Chapter 19: Memory Model and Atomics -- Chapter 20: Backend Interoperability -- Chapter 21: Migrating CUDA Code -- Epilogue. |
| Record Nr. | UNINA-9910746982603321 |
Reinders James
|
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| Berkeley, CA : , : Apress : , : Imprint : Apress, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Data Parallel C++ : Mastering DPC++ for Programming of Heterogeneous Systems using C++ and SYCL / / by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian
| Data Parallel C++ : Mastering DPC++ for Programming of Heterogeneous Systems using C++ and SYCL / / by James Reinders, Ben Ashbaugh, James Brodman, Michael Kinsner, John Pennycook, Xinmin Tian |
| Autore | Reinders James |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Springer Nature, 2021 |
| Descrizione fisica | 1 online resource (XXVI, 548 p. 338 illus., 280 illus. in color.) |
| Disciplina | 005.13 |
| Soggetto topico |
Heterogeneous computing
C++ (Computer program language) OpenCL (Computer program language) |
| ISBN |
9781484255742
1484255747 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1: Introduction -- Chapter 2: Where code executes -- Chapter 3: Data management and ordering the uses of data -- Chapter 4: Expressing parallelism -- Chapter 5: Error handling -- Chapter 6: USM in detail -- Chapter 7: Buffers in detail -- Chapter 8: DAG scheduling in detail -- Chapter 9: Local memory and work-group barriers -- Chapter 10: Defining kernels -- Chapter 11: Vectors -- Chapter 12: Device-specific extension mechanism -- Chapter 13: Programming for GPUs -- Chapter 14: Programming for CPUs -- Chapter 15: Programming for FPGAs -- Chapter 16: Address spaces and multi_ptr -- Chapter 17: Using libraries -- Chapter 18: Working with OpenCL -- Chapter 19: Memory model and atomics. |
| Record Nr. | UNINA-9910424954703321 |
|
Reinders James
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| Springer Nature, 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers
| High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers |
| Autore | Reinders James |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 |
| Descrizione fisica | 1 online resource (549 p.) |
| Disciplina | 005.275 |
| Soggetto topico |
Parallel programming (Computer science) - Data processing
Coprocessors |
| Soggetto genere / forma | Electronic books. |
| ISBN | 0-12-802199-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Performance Parallelism Pearls: Multicore and Many-core Programming Approaches; Copyright; Contents; Contributors; Acknowledgments; Foreword; Humongous computing needs: Science years in the making; Open standards; Keen on many-core architecture; Xeon Phi is born: Many cores, excellent vector ISA ; Learn highly scalable parallel programming; Future demands grow: Programming models matter; Preface; Inspired by 61 cores: A new era in programming; Chapter 1: Introduction; Learning from successful experiences; Code modernization; Modernize with concurrent algorithms
Modernize with vectorization and data localityUnderstanding power usage; ISPC and OpenCL anyone?; Intel Xeon Phi coprocessor specific; Many-core, neo-heterogeneous; No "Xeon Phi" in the title, neo-heterogeneous programming; The future of many-core; Downloads; Chapter 2: From "Correct" to "Correct & Efficient": A Hydro2D Case Study with Godunov's Scheme; Scientific computing on contemporary computers; Modern computing environments; CEA's Hydro2D; A numerical method for shock hydrodynamics; Euler's equation; Godunov's method; Where it fits; Features of modern architectures Performance-oriented architectureProgramming tools and runtimes; Our computing environments; Paths to performance; Running Hydro2D; Hydro2D's structure; Computation scheme; Data structures; Measuring performance; Optimizations; Memory usage; Thread-level parallelism; Arithmetic efficiency and instruction-level parallelism; Data-level parallelism; Summary; The coprocessor vs the processor; A rising tide lifts all boats; Performance strategies; Chapter 3: Better Concurrency and SIMD on HBM ; The application: HIROMB - BOOS -Model; Key usage: DMI ; HBM execution profile Overview for the optimization of HBM Data structures: Locality done right; Thread parallelism in HBM ; Data parallelism: SIMD vectorization; Trivial obstacles; Premature abstraction is the root of all evil; Results; Profiling details; Scaling on processor vs. coprocessor; Contiguous attribute; Summary; References; Chapter 4: Optimizing for Reacting Navier-Stokes Equations; Getting started; Version 1.0: Baseline; Version 2.0: ThreadBox ; Version 3.0: Stack memory; Version 4.0: Blocking; Version 5.0: Vectorization; Intel Xeon Phi coprocessor results; Summary Chapter 5: Plesiochronous Phasing BarriersWhat can be done to improve the code?; What more can be done to improve the code?; Hyper-Thread Phalanx; What is nonoptimal about this strategy?; Coding the Hyper-Thread Phalanx; How to determine thread binding to core and HT within core?; The Hyper-Thread Phalanx hand-partitioning technique; A lesson learned; Back to work; Data alignment; Use aligned data when possible; Redundancy can be good for you; The plesiochronous phasing barrier; Let us do something to recover this wasted time; A few "left to the reader" possibilities Xeon host performance improvements similar to Xeon Phi |
| Record Nr. | UNINA-9910459676203321 |
|
Reinders James
|
||
| Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers
| High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers |
| Autore | Reinders James |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 |
| Descrizione fisica | 1 online resource (549 p.) |
| Disciplina | 005.275 |
| Soggetto topico |
Parallel programming (Computer science) - Data processing
Coprocessors |
| ISBN | 0-12-802199-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Performance Parallelism Pearls: Multicore and Many-core Programming Approaches; Copyright; Contents; Contributors; Acknowledgments; Foreword; Humongous computing needs: Science years in the making; Open standards; Keen on many-core architecture; Xeon Phi is born: Many cores, excellent vector ISA ; Learn highly scalable parallel programming; Future demands grow: Programming models matter; Preface; Inspired by 61 cores: A new era in programming; Chapter 1: Introduction; Learning from successful experiences; Code modernization; Modernize with concurrent algorithms
Modernize with vectorization and data localityUnderstanding power usage; ISPC and OpenCL anyone?; Intel Xeon Phi coprocessor specific; Many-core, neo-heterogeneous; No "Xeon Phi" in the title, neo-heterogeneous programming; The future of many-core; Downloads; Chapter 2: From "Correct" to "Correct & Efficient": A Hydro2D Case Study with Godunov's Scheme; Scientific computing on contemporary computers; Modern computing environments; CEA's Hydro2D; A numerical method for shock hydrodynamics; Euler's equation; Godunov's method; Where it fits; Features of modern architectures Performance-oriented architectureProgramming tools and runtimes; Our computing environments; Paths to performance; Running Hydro2D; Hydro2D's structure; Computation scheme; Data structures; Measuring performance; Optimizations; Memory usage; Thread-level parallelism; Arithmetic efficiency and instruction-level parallelism; Data-level parallelism; Summary; The coprocessor vs the processor; A rising tide lifts all boats; Performance strategies; Chapter 3: Better Concurrency and SIMD on HBM ; The application: HIROMB - BOOS -Model; Key usage: DMI ; HBM execution profile Overview for the optimization of HBM Data structures: Locality done right; Thread parallelism in HBM ; Data parallelism: SIMD vectorization; Trivial obstacles; Premature abstraction is the root of all evil; Results; Profiling details; Scaling on processor vs. coprocessor; Contiguous attribute; Summary; References; Chapter 4: Optimizing for Reacting Navier-Stokes Equations; Getting started; Version 1.0: Baseline; Version 2.0: ThreadBox ; Version 3.0: Stack memory; Version 4.0: Blocking; Version 5.0: Vectorization; Intel Xeon Phi coprocessor results; Summary Chapter 5: Plesiochronous Phasing BarriersWhat can be done to improve the code?; What more can be done to improve the code?; Hyper-Thread Phalanx; What is nonoptimal about this strategy?; Coding the Hyper-Thread Phalanx; How to determine thread binding to core and HT within core?; The Hyper-Thread Phalanx hand-partitioning technique; A lesson learned; Back to work; Data alignment; Use aligned data when possible; Redundancy can be good for you; The plesiochronous phasing barrier; Let us do something to recover this wasted time; A few "left to the reader" possibilities Xeon host performance improvements similar to Xeon Phi |
| Record Nr. | UNINA-9910787136203321 |
|
Reinders James
|
||
| Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers
| High performance parallelism pearls : multicore and many-core programming approaches / / James Reinders, Jim Jeffers |
| Autore | Reinders James |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 |
| Descrizione fisica | 1 online resource (549 p.) |
| Disciplina | 005.275 |
| Soggetto topico |
Parallel programming (Computer science) - Data processing
Coprocessors |
| ISBN | 0-12-802199-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Performance Parallelism Pearls: Multicore and Many-core Programming Approaches; Copyright; Contents; Contributors; Acknowledgments; Foreword; Humongous computing needs: Science years in the making; Open standards; Keen on many-core architecture; Xeon Phi is born: Many cores, excellent vector ISA ; Learn highly scalable parallel programming; Future demands grow: Programming models matter; Preface; Inspired by 61 cores: A new era in programming; Chapter 1: Introduction; Learning from successful experiences; Code modernization; Modernize with concurrent algorithms
Modernize with vectorization and data localityUnderstanding power usage; ISPC and OpenCL anyone?; Intel Xeon Phi coprocessor specific; Many-core, neo-heterogeneous; No "Xeon Phi" in the title, neo-heterogeneous programming; The future of many-core; Downloads; Chapter 2: From "Correct" to "Correct & Efficient": A Hydro2D Case Study with Godunov's Scheme; Scientific computing on contemporary computers; Modern computing environments; CEA's Hydro2D; A numerical method for shock hydrodynamics; Euler's equation; Godunov's method; Where it fits; Features of modern architectures Performance-oriented architectureProgramming tools and runtimes; Our computing environments; Paths to performance; Running Hydro2D; Hydro2D's structure; Computation scheme; Data structures; Measuring performance; Optimizations; Memory usage; Thread-level parallelism; Arithmetic efficiency and instruction-level parallelism; Data-level parallelism; Summary; The coprocessor vs the processor; A rising tide lifts all boats; Performance strategies; Chapter 3: Better Concurrency and SIMD on HBM ; The application: HIROMB - BOOS -Model; Key usage: DMI ; HBM execution profile Overview for the optimization of HBM Data structures: Locality done right; Thread parallelism in HBM ; Data parallelism: SIMD vectorization; Trivial obstacles; Premature abstraction is the root of all evil; Results; Profiling details; Scaling on processor vs. coprocessor; Contiguous attribute; Summary; References; Chapter 4: Optimizing for Reacting Navier-Stokes Equations; Getting started; Version 1.0: Baseline; Version 2.0: ThreadBox ; Version 3.0: Stack memory; Version 4.0: Blocking; Version 5.0: Vectorization; Intel Xeon Phi coprocessor results; Summary Chapter 5: Plesiochronous Phasing BarriersWhat can be done to improve the code?; What more can be done to improve the code?; Hyper-Thread Phalanx; What is nonoptimal about this strategy?; Coding the Hyper-Thread Phalanx; How to determine thread binding to core and HT within core?; The Hyper-Thread Phalanx hand-partitioning technique; A lesson learned; Back to work; Data alignment; Use aligned data when possible; Redundancy can be good for you; The plesiochronous phasing barrier; Let us do something to recover this wasted time; A few "left to the reader" possibilities Xeon host performance improvements similar to Xeon Phi |
| Record Nr. | UNINA-9910812710103321 |
|
Reinders James
|
||
| Waltham, Massachusetts : , : Morgan Kaufmann, , 2015 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||