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ISVLSI 2005: 2005 IEEE Computer Society Annual Symposium on VLSI (11-12 May 2005/Tampa, FL
ISVLSI 2005: 2005 IEEE Computer Society Annual Symposium on VLSI (11-12 May 2005/Tampa, FL
Autore Smailagic Asim
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society Press, 2005
ISBN 1-5386-0092-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996202412603316
Smailagic Asim  
[Place of publication not identified], : IEEE Computer Society Press, 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
ISVLSI 2005: 2005 IEEE Computer Society Annual Symposium on VLSI (11-12 May 2005/Tampa, FL
ISVLSI 2005: 2005 IEEE Computer Society Annual Symposium on VLSI (11-12 May 2005/Tampa, FL
Autore Smailagic Asim
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society Press, 2005
ISBN 1-5386-0092-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910146537203321
Smailagic Asim  
[Place of publication not identified], : IEEE Computer Society Press, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Transactions on Computational Science XXIV [[electronic resource] ] : Special Issue on Reversible Computing / / edited by Marina L. Gavrilova, C.J. Kenneth Tan, Himanshu Thapliyal, Nagarajan Ranganathan
Transactions on Computational Science XXIV [[electronic resource] ] : Special Issue on Reversible Computing / / edited by Marina L. Gavrilova, C.J. Kenneth Tan, Himanshu Thapliyal, Nagarajan Ranganathan
Edizione [1st ed. 2014.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2014
Descrizione fisica 1 online resource (XIII, 147 p. 72 illus.)
Disciplina 004
Collana Transactions on Computational Science
Soggetto topico Arithmetic and logic units, Computer
Logic design
Computers
Quantum computers
Arithmetic and Logic Structures
Logic Design
Computation by Abstract Devices
Quantum Computing
ISBN 3-662-45711-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Adiabatic CMOS: Limits of Reversible Energy Recovery and First Steps for Design Automation -- Ultrafast All-Optical Reversible Peres and Feynman-Double Logic Gates with Silicon Microring Resonators -- Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain -- Towards Reversible Basic Linear Algebra Subprograms: A Performance Study -- Synthesis and Optimization by Quantum Circuit Description Language -- An Approach to Reversible Logic Synthesis Using Input and Output Permutations -- Synthesis of Reversible Circuits Based on EXORs of Products of EXORs -- Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic.
Record Nr. UNINA-9910484590203321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2014
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Transactions on Computational Science XXIV [[electronic resource] ] : Special Issue on Reversible Computing / / edited by Marina L. Gavrilova, C.J. Kenneth Tan, Himanshu Thapliyal, Nagarajan Ranganathan
Transactions on Computational Science XXIV [[electronic resource] ] : Special Issue on Reversible Computing / / edited by Marina L. Gavrilova, C.J. Kenneth Tan, Himanshu Thapliyal, Nagarajan Ranganathan
Edizione [1st ed. 2014.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2014
Descrizione fisica 1 online resource (XIII, 147 p. 72 illus.)
Disciplina 004
Collana Transactions on Computational Science
Soggetto topico Arithmetic and logic units, Computer
Logic design
Computers
Quantum computers
Arithmetic and Logic Structures
Logic Design
Computation by Abstract Devices
Quantum Computing
ISBN 3-662-45711-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Adiabatic CMOS: Limits of Reversible Energy Recovery and First Steps for Design Automation -- Ultrafast All-Optical Reversible Peres and Feynman-Double Logic Gates with Silicon Microring Resonators -- Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain -- Towards Reversible Basic Linear Algebra Subprograms: A Performance Study -- Synthesis and Optimization by Quantum Circuit Description Language -- An Approach to Reversible Logic Synthesis Using Input and Output Permutations -- Synthesis of Reversible Circuits Based on EXORs of Products of EXORs -- Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic.
Record Nr. UNISA-996211261703316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2014
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui