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Architecture of Computing Systems : 37th International Conference, ARCS 2024, Potsdam, Germany, May 14–16, 2024, Proceedings / / edited by Dietmar Fey, Benno Stabernack, Stefan Lankes, Mathias Pacher, Thilo Pionteck
| Architecture of Computing Systems : 37th International Conference, ARCS 2024, Potsdam, Germany, May 14–16, 2024, Proceedings / / edited by Dietmar Fey, Benno Stabernack, Stefan Lankes, Mathias Pacher, Thilo Pionteck |
| Autore | Fey Dietmar |
| Edizione | [1st ed. 2024.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2024 |
| Descrizione fisica | 1 online resource (368 pages) |
| Disciplina | 004.6 |
| Altri autori (Persone) |
StabernackBenno
LankesStefan PacherMathias PionteckThilo |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer networks
Computer systems Computer engineering Artificial intelligence Computers Computer Communication Networks Computer System Implementation Computer Engineering and Networks Artificial Intelligence Computer Hardware |
| ISBN | 3-031-66146-X |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Intro -- Preface -- Organization -- Keynote Talks -- Strategies towards Green HPC - Environmental Analysis and Applied Ecodesign -- Co-Designing Processor Arrays and their Compiler - "The Whole is Greater than the Sum of the Parts" -- Contents -- Progress in Neural Networks -- nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models -- 1 Introduction -- 2 Processor -- 2.1 Initial Architecture -- 3 Toolchain -- 3.1 Assembler -- 3.2 Scheduler -- 3.3 Software Pipelining -- 4 Results and Discussion -- 4.1 Benchmarks -- 4.2 Design Space Exploration -- 4.3 Comparison -- 4.4 Analysis and Optimization -- 5 Conclusion -- References -- An Approach Towards Distributed DNN Training on FPGA Clusters -- 1 Introduction -- 2 Related Work -- 3 Background -- 4 Tool Flow -- 5 Evaluation -- 6 Conclusion -- References -- The Power of Training: How Different Neural Network Setups Influence the Energy Demand -- 1 Introduction -- 2 Related Works -- 2.1 Energy Tracking -- 2.2 Hyperparameter Selection -- 3 Methodology -- 3.1 Experiment Setup -- 3.2 Training Regime -- 3.3 Learning Paradigm -- 4 Training Regime Results -- 5 Pretraining Learning Paradigm Results -- 6 Multitask Learning Paradigm Results -- 7 Correlation with High-End Consumer Hardware -- 8 Conclusion -- References -- Organic Computing -- An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing -- 1 Introduction -- 2 Related Work -- 2.1 Quantile Regression Neural Network -- 2.2 Composite Quantile Regression Neural Network -- 2.3 Monotone Composite Quantile Regression Neural Network -- 2.4 Differentiable Sorting -- 3 Methodology -- 3.1 Sorted Composite Quantile Regression Neural Network -- 3.2 Theoretical Complexity Analysis -- 3.3 Datasets -- 3.4 Experiment 1 -- 3.5 Experiment 2 -- 4 Results and Discussion -- 4.1 Experiment 1 -- 4.2 Experiment 2.
5 Conclusion -- References -- Modifiable Artificial DNA - Change Your System's ADNA at Any Time -- 1 Introduction -- 2 Related Work -- 3 Artificial Hormone System and Artificial DNA -- 4 Modifications -- 4.1 Task Structure and Applicable Modifications -- 4.2 ADNA at Runtime -- 4.3 Communicating and Applying the Changes -- 5 Experimental Evaluation -- 5.1 Setup and Environment -- 5.2 Predictions -- 5.3 Hormone Cycle Length Dependency -- 5.4 Modifications on a Fixed ADNA -- 5.5 Expanding to Larger ADNAs -- 6 Future Work -- 6.1 Blank Tasks -- 6.2 Two Phase Modification -- 7 Conclusion -- References -- From Structured to Unstructured: A Comparative Analysis of Computer Vision and Graph Models in Solving Mesh-Based PDEs -- 1 Introduction -- 2 Related Work -- 3 Methodology and Data -- 3.1 Models -- 3.2 Datasets -- 3.3 Experimental Setup -- 4 Results and Discussion -- 5 Conclusion -- References -- Enhancing Maritime Behaviour Analysis Through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in the Kiel Fjord -- 1 Introduction -- 2 Background -- 2.1 Maritime Navigation Behaviour Analysis -- 2.2 SV-NBA Framework for Spatio-Temporal Analysis in Maritime Applications -- 3 Approach -- 3.1 Spatio-Temporal Feature Extraction -- 3.2 Trajectory Mining -- 3.3 Behaviour Analysis and Visualisation -- 4 Experiments -- 4.1 Experimental Setup -- 4.2 Experimental Results -- 5 Analysis and Discussion -- 6 Conclusion -- A Appendix -- References -- Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI -- 1 Introduction -- 2 Background -- 2.1 Image Augmentation -- 2.2 Segment Anything Model (SAM) -- 2.3 Diffusion Models (DMs) -- 3 Methodological Approach -- 3.1 Data Set -- 3.2 Data Transformation -- 3.3 Image Generation -- 4 Evaluation -- 5 Discussion -- 6 Conclusion and Outlook -- References. Towards the Online Reconfiguration of a Dependable Distributed On-Board Computer -- 1 Introduction -- 1.1 ScOSA - The Scalable On-Board Computer Architecture for Space Avionics -- 1.2 Reconfiguration Services -- 2 Related Work -- 3 Design of the Online Algorithm -- 3.1 Scheduling -- 4 Evaluation -- 5 Results and Discussion -- 5.1 Timing Analysis -- 5.2 Network Analysis -- 5.3 Memory Analysis -- 6 Conclusions -- References -- An Organic Computing Approach for CARLA Simulator -- 1 Introduction -- 2 Related Work -- 3 ADNA-Based Organic Computing -- 3.1 Artificial Hormone System - AHS -- 3.2 Artificial DNA - ADNA -- 4 CARLA Automotive Simulator -- 5 pyDNAAHS: Organic Computing Interface for CARLA -- 6 Proof of Concept -- 7 Conclusion -- References -- Computer Architecture Co-Design -- Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity -- 1 Introduction -- 2 System Model -- 3 Problem Statement -- 4 Proposed Solution -- 4.1 Reducing Energy for FPGA Configuration Phase -- 4.2 Minimize Number of Configurations by Idle-Waiting -- 4.3 Analytical Model -- 5 Experiments and Results -- 5.1 Experiments Setup -- 5.2 Experiment 1: Optimization on Energy for FPGA Configuration -- 5.3 Experiment 2: Idle-Waiting vs On-Off Strategies -- 5.4 Experiment 3: Optimization on the Idle-Waiting Strategy -- 6 Related Work -- 7 Conclusion and Future Work -- References -- On-the-Fly CT Image Pre-processing on MPSoC-FPGAs -- 1 Introduction -- 2 Background: CT Imaging -- 3 CT Pre-processing Phase: Proposed Optimizations -- 4 Realization -- 5 Discussion -- 6 Summary -- References -- AccProf: Increasing the Accuracy of Embedded Application Profiling Using FPGAs -- 1 Introduction -- 2 Related Work -- 3 AccProf - Design and Implementation -- 3.1 Instrumentation Engine Based on LLVM -- 3.2 FPGA Hardware - HLS Driven. 3.3 The SeL4 Microkernel and Pass - HLS Communication -- 4 Evaluation -- 4.1 Testbed -- 4.2 The STREAM Benchmark -- 4.3 Embench Benchark Suite -- 4.4 Discussion -- 5 Conclusions -- References -- Accelerating WebAssembly Interpreters in Embedded Systems Through Hardware-Assisted Dispatching -- 1 Introduction -- 2 Related Work -- 3 WebAssembly -- 4 Computed GoTo -- 5 Accelerator Design -- 5.1 Hardware Design -- 5.2 Software Integration -- 6 Evaluation -- 6.1 Binary Size -- 6.2 Effect on Benchmark Runtime -- 6.3 Acceleration by WASM Opcode -- 7 Conclusion and Outlook -- References -- Exploring the ARM Coherent Mesh Network Topology -- 1 Introduction -- 2 Background: The ARM Coherent Mesh Network, CMN -- 3 Extracting the ARM CMN Topology -- 3.1 Mesh Size and Node Locations -- 3.2 CPU Core and Peripheral Locations -- 4 Measurements and Results -- 4.1 Synthetic Benchmarks -- 4.2 LULESH Benchmark -- 4.3 Discussion -- 5 Related Works -- 6 Conclusion -- References -- Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level -- 1 Introduction -- 2 BSD Introduction and FA Based Circuitry for the Adder -- 3 Implementation on Physical Layout Level -- 4 Evaluation -- 4.1 Timing -- 4.2 Area -- 4.3 Power -- 5 Summary and Future Work -- References -- Progress in HPC -- Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC -- 1 Introduction -- 2 Background -- 3 NUMA Architecture: Modeling and Exploration -- 3.1 Modeling NUMA Topologies with Gem5 -- 3.2 NUMA Modeling in VPSim -- 4 Evaluation -- 4.1 Performance for Different NoC Bandwidths -- 4.2 STREAM TRIAD on a 4-NUMA Node GPP -- 4.3 Application Performance Characterization Using VPSim -- 4.4 Memory Page Migration in NUMA Systems -- 5 Conclusion and Perspectives -- References. A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers -- 1 Introduction -- 2 Related Work and Background -- 2.1 Generalized Stochastic Petri Nets -- 2.2 Reliability Block Diagrams -- 3 Proposed Models -- 3.1 Reliability Model -- 3.2 Performability Model -- 3.3 Dynamic Mean Time to Failure Model -- 3.4 Overall Proposed Performability Method for BBs -- 4 Evaluation -- 4.1 Exploratory Analysis -- 4.2 Models Validation -- 4.3 Experimental Results -- 5 Conclusion -- References -- Generative-Based Algorithm for Data Clustering on Hybrid Classical-Quantum NISQ Architecture -- 1 Motivations and Objectives -- 2 Related Works -- 3 Our Approach and Implementation -- 3.1 From Neural Network to QCBM -- 3.2 Focus on Machine Learning Algorithm: QCBM & -- EM Clustering -- 3.3 Specificities of Task Distribution on a CPU-QPU Architecture -- 3.4 Implementation with Qiskit Framework -- 4 Experiments -- 4.1 Comparing Models -- 4.2 Impact of Quantum Noise -- 4.3 Test on Real Quantum Hardware -- 5 Conclusion and Perspective -- References -- Computer Architecture -- Improving Memory Dependence Prediction with Static Analysis -- 1 Introduction -- 1.1 Memory Dependence Prediction in Out-of-Order Execution -- 1.2 ``Predict No Dependency'' Load Labels -- 1.3 Contributions -- 2 Finding PND Labels with LLVM -- 2.1 Analysis Algorithm -- 2.2 Analysis Limitations -- 2.3 Compiler to CPU Communication -- 3 Simulation and Workflow -- 3.1 Experimental Design -- 3.2 Simulating PND Labels in Gem5 -- 3.3 Gem5 CPU Configuration and the Store Sets Predictor -- 3.4 Simulation Workflow -- 4 Evaluation -- 4.1 Coverage -- 4.2 CPI over CPU Sizes -- 4.3 Discussion -- 5 Threats to Validity -- 6 Related Work -- 7 Conclusions -- 8 Future Work -- References -- Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems. 1 Introduction. |
| Record Nr. | UNINA-9910878981903321 |
Fey Dietmar
|
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2024 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck
| Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck |
| Autore | Goumas Georgios |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (333 pages) |
| Disciplina | 004.6 |
| Altri autori (Persone) |
TomfordeSven
BrehmJürgen WildermannStefan PionteckThilo |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer networks
Computer systems Computer engineering Artificial intelligence Computers Computer Communication Networks Computer System Implementation Computer Engineering and Networks Artificial Intelligence Computer Hardware |
| ISBN | 3-031-42785-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Accelerating Neural Networks -- Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design -- A Comparative Study of Neural Network Compilers on ARMv8 Architecture -- Organic Computing Methodology (OC) -- A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems -- Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning -- Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing -- Dependability and Fault Tolerance (VERFE) Error Codes in and for Network Steganography -- Modified Cross Parity Codes For Adjacent Double Error Correction -- Computer Architecture Co-Design -- COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores -- Post-Silicon Customization Using Deep Neural Networks -- Computer Architectures and Operating Systems -- TOSTING: Investigating Total Store Ordering on ARM -- Back to the Core-Memory Age: Running Operating Systems in NVRAM only -- Retrofitting AMD x86 processors with active virtual machine introspection capabilities -- Organic Computing Applications 1 (OC) -- Abstract Artificial DNA’s Improved Time Bounds -- Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks -- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs -- Hardware Acceleration -- Improved Condition Handling in CGRAs with Complex Loop Support -- FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective -- Optimization of OLAP In-memory DB Management Systems with PIM -- Organic Computing Applications 2 (OC) -- Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning -- Autonomous ship collision avoidance trained on observational data -- Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing. |
| Record Nr. | UNISA-996546850003316 |
|
Goumas Georgios
|
||
| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Architecture of Computing Systems : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck
| Architecture of Computing Systems : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck |
| Autore | Goumas Georgios |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (333 pages) |
| Disciplina | 004.6 |
| Altri autori (Persone) |
TomfordeSven
BrehmJürgen WildermannStefan PionteckThilo |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer networks
Computer systems Computer engineering Artificial intelligence Computers Computer Communication Networks Computer System Implementation Computer Engineering and Networks Artificial Intelligence Computer Hardware |
| ISBN | 3-031-42785-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Accelerating Neural Networks -- Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design -- A Comparative Study of Neural Network Compilers on ARMv8 Architecture -- Organic Computing Methodology (OC) -- A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems -- Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning -- Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing -- Dependability and Fault Tolerance (VERFE) Error Codes in and for Network Steganography -- Modified Cross Parity Codes For Adjacent Double Error Correction -- Computer Architecture Co-Design -- COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores -- Post-Silicon Customization Using Deep Neural Networks -- Computer Architectures and Operating Systems -- TOSTING: Investigating Total Store Ordering on ARM -- Back to the Core-Memory Age: Running Operating Systems in NVRAM only -- Retrofitting AMD x86 processors with active virtual machine introspection capabilities -- Organic Computing Applications 1 (OC) -- Abstract Artificial DNA’s Improved Time Bounds -- Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks -- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs -- Hardware Acceleration -- Improved Condition Handling in CGRAs with Complex Loop Support -- FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective -- Optimization of OLAP In-memory DB Management Systems with PIM -- Organic Computing Applications 2 (OC) -- Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning -- Autonomous ship collision avoidance trained on observational data -- Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing. |
| Record Nr. | UNINA-9910742494303321 |
|
Goumas Georgios
|
||
| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems [[electronic resource] ] : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck
| Architecture of Computing Systems [[electronic resource] ] : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (239 pages) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Computer input-output equipment Software engineering Computer Communication Networks Computer System Implementation Input/Output and Data Communications Software Engineering |
| ISBN | 3-030-81682-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Memory Organization -- Locality: The 3rd Wall and The Need for Innovation in Parallel Architectures -- Static extraction of memory access profiles for multi-core interference analysis of real-time tasks -- Transparent Resilience for Approximate DRAM -- Heterogeneous Computing -- Automatic Mapping of Parallel Pattern-based Algorithms on Heterogeneous Architectures -- Assessing and Improving the Suitability of Model-Based Design for GPU-Accelerated Railway Control Systems -- DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model -- Instruction Set Transformations -- Performance Gain of a Data Flow Oriented ISA as Replacement for Java Bytecode -- Towards Transparent Dynamic Binary Translation from RISC-V to a CGRA -- Organic Computing -- An Organic Computing System for Automated Testing -- Evaluating a Priority-Based Task Distribution Strategy for an Artificial Hormone System -- Low Power Design -- Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-Core MCUs -- Energy Efficient Power-Management for Out-of-Order Processors using Cyclic Power-Gating -- VEFRE Workshop -- BCH 2-Bit and 3-Bit Error Correction with Fast Multi-Bit Error Detection -- Evaluating Soft Error Mitigation Trade-offs During Early Design Stages. |
| Record Nr. | UNISA-996464513403316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck
| Architecture of Computing Systems : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (239 pages) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Computer input-output equipment Software engineering Computer Communication Networks Computer System Implementation Input/Output and Data Communications Software Engineering Arquitectura d'ordinadors Sistemes informàtics |
| Soggetto genere / forma |
Congressos
Llibres electrònics |
| ISBN | 3-030-81682-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Memory Organization -- Locality: The 3rd Wall and The Need for Innovation in Parallel Architectures -- Static extraction of memory access profiles for multi-core interference analysis of real-time tasks -- Transparent Resilience for Approximate DRAM -- Heterogeneous Computing -- Automatic Mapping of Parallel Pattern-based Algorithms on Heterogeneous Architectures -- Assessing and Improving the Suitability of Model-Based Design for GPU-Accelerated Railway Control Systems -- DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model -- Instruction Set Transformations -- Performance Gain of a Data Flow Oriented ISA as Replacement for Java Bytecode -- Towards Transparent Dynamic Binary Translation from RISC-V to a CGRA -- Organic Computing -- An Organic Computing System for Automated Testing -- Evaluating a Priority-Based Task Distribution Strategy for an Artificial Hormone System -- Low Power Design -- Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-Core MCUs -- Energy Efficient Power-Management for Out-of-Order Processors using Cyclic Power-Gating -- VEFRE Workshop -- BCH 2-Bit and 3-Bit Error Correction with Fast Multi-Bit Error Detection -- Evaluating Soft Error Mitigation Trade-offs During Early Design Stages. |
| Record Nr. | UNINA-9910492144003321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems - ARCS 2017 [[electronic resource] ] : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck
| Architecture of Computing Systems - ARCS 2017 [[electronic resource] ] : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck |
| Edizione | [1st ed. 2017.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
| Descrizione fisica | 1 online resource (XIII, 262 p. 100 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-54999-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Resilience -- Accelerators -- Performance -- Memory systems -- Parallelism and many-core -- Scheduling -- Power/energy. |
| Record Nr. | UNISA-996466334103316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems - ARCS 2017 : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck
| Architecture of Computing Systems - ARCS 2017 : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck |
| Edizione | [1st ed. 2017.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
| Descrizione fisica | 1 online resource (XIII, 262 p. 100 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-54999-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Resilience -- Accelerators -- Performance -- Memory systems -- Parallelism and many-core -- Scheduling -- Power/energy. |
| Record Nr. | UNINA-9910485015603321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems -- ARCS 2016 [[electronic resource] ] : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich
| Architecture of Computing Systems -- ARCS 2016 [[electronic resource] ] : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (XX, 402 p. 164 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-30695-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| Record Nr. | UNISA-996466022303316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems -- ARCS 2016 : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich
| Architecture of Computing Systems -- ARCS 2016 : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (XX, 402 p. 164 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-30695-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| Record Nr. | UNINA-9910483949703321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Architecture of Computing Systems – ARCS 2018 [[electronic resource] ] : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck
| Architecture of Computing Systems – ARCS 2018 [[electronic resource] ] : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (XV, 326 p. 112 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Logic design Operating systems (Computers) Microprocessors Computer architecture Computer systems Computer input-output equipment Computer Communication Networks Logic Design Operating Systems Processor Architectures Computer System Implementation Input/Output and Data Communications |
| ISBN | 3-319-77610-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Embedded Systems -- Multicore Systems -- Analysis and Optimization -- On-Chip and Off-Chip Networks -- Memory Models and Systems -- Energy Ecient Systems -- Partial Reconguration -- Large Scale Computing. |
| Record Nr. | UNISA-996465756303316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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