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Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck
| Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck |
| Autore | Goumas Georgios |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (333 pages) |
| Disciplina | 004.6 |
| Altri autori (Persone) |
TomfordeSven
BrehmJürgen WildermannStefan PionteckThilo |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer networks
Computer systems Computer engineering Artificial intelligence Computers Computer Communication Networks Computer System Implementation Computer Engineering and Networks Artificial Intelligence Computer Hardware |
| ISBN | 3-031-42785-8 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Accelerating Neural Networks -- Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design -- A Comparative Study of Neural Network Compilers on ARMv8 Architecture -- Organic Computing Methodology (OC) -- A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems -- Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning -- Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing -- Dependability and Fault Tolerance (VERFE) Error Codes in and for Network Steganography -- Modified Cross Parity Codes For Adjacent Double Error Correction -- Computer Architecture Co-Design -- COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores -- Post-Silicon Customization Using Deep Neural Networks -- Computer Architectures and Operating Systems -- TOSTING: Investigating Total Store Ordering on ARM -- Back to the Core-Memory Age: Running Operating Systems in NVRAM only -- Retrofitting AMD x86 processors with active virtual machine introspection capabilities -- Organic Computing Applications 1 (OC) -- Abstract Artificial DNA’s Improved Time Bounds -- Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks -- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs -- Hardware Acceleration -- Improved Condition Handling in CGRAs with Complex Loop Support -- FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective -- Optimization of OLAP In-memory DB Management Systems with PIM -- Organic Computing Applications 2 (OC) -- Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning -- Autonomous ship collision avoidance trained on observational data -- Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing. |
| Record Nr. | UNINA-9910742494303321 |
Goumas Georgios
|
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck
| Architecture of Computing Systems [[electronic resource] ] : 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings / / edited by Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck |
| Autore | Goumas Georgios |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (333 pages) |
| Disciplina | 004.6 |
| Altri autori (Persone) |
TomfordeSven
BrehmJürgen WildermannStefan PionteckThilo |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer networks
Computer systems Computer engineering Artificial intelligence Computers Computer Communication Networks Computer System Implementation Computer Engineering and Networks Artificial Intelligence Computer Hardware |
| ISBN | 3-031-42785-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Accelerating Neural Networks -- Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design -- A Comparative Study of Neural Network Compilers on ARMv8 Architecture -- Organic Computing Methodology (OC) -- A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems -- Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning -- Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing -- Dependability and Fault Tolerance (VERFE) Error Codes in and for Network Steganography -- Modified Cross Parity Codes For Adjacent Double Error Correction -- Computer Architecture Co-Design -- COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores -- Post-Silicon Customization Using Deep Neural Networks -- Computer Architectures and Operating Systems -- TOSTING: Investigating Total Store Ordering on ARM -- Back to the Core-Memory Age: Running Operating Systems in NVRAM only -- Retrofitting AMD x86 processors with active virtual machine introspection capabilities -- Organic Computing Applications 1 (OC) -- Abstract Artificial DNA’s Improved Time Bounds -- Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks -- CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs -- Hardware Acceleration -- Improved Condition Handling in CGRAs with Complex Loop Support -- FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective -- Optimization of OLAP In-memory DB Management Systems with PIM -- Organic Computing Applications 2 (OC) -- Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning -- Autonomous ship collision avoidance trained on observational data -- Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing. |
| Record Nr. | UNISA-996546850003316 |
|
Goumas Georgios
|
||
| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Architecture of Computing Systems [[electronic resource] ] : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck
| Architecture of Computing Systems [[electronic resource] ] : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (239 pages) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Computer input-output equipment Software engineering Computer Communication Networks Computer System Implementation Input/Output and Data Communications Software Engineering |
| ISBN | 3-030-81682-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Memory Organization -- Locality: The 3rd Wall and The Need for Innovation in Parallel Architectures -- Static extraction of memory access profiles for multi-core interference analysis of real-time tasks -- Transparent Resilience for Approximate DRAM -- Heterogeneous Computing -- Automatic Mapping of Parallel Pattern-based Algorithms on Heterogeneous Architectures -- Assessing and Improving the Suitability of Model-Based Design for GPU-Accelerated Railway Control Systems -- DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model -- Instruction Set Transformations -- Performance Gain of a Data Flow Oriented ISA as Replacement for Java Bytecode -- Towards Transparent Dynamic Binary Translation from RISC-V to a CGRA -- Organic Computing -- An Organic Computing System for Automated Testing -- Evaluating a Priority-Based Task Distribution Strategy for an Artificial Hormone System -- Low Power Design -- Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-Core MCUs -- Energy Efficient Power-Management for Out-of-Order Processors using Cyclic Power-Gating -- VEFRE Workshop -- BCH 2-Bit and 3-Bit Error Correction with Fast Multi-Bit Error Detection -- Evaluating Soft Error Mitigation Trade-offs During Early Design Stages. |
| Record Nr. | UNISA-996464513403316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck
| Architecture of Computing Systems : 34th International Conference, ARCS 2021, Virtual Event, June 7–8, 2021, Proceedings / / edited by Christian Hochberger, Lars Bauer, Thilo Pionteck |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (239 pages) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Computer input-output equipment Software engineering Computer Communication Networks Computer System Implementation Input/Output and Data Communications Software Engineering Arquitectura d'ordinadors Sistemes informàtics |
| Soggetto genere / forma |
Congressos
Llibres electrònics |
| ISBN | 3-030-81682-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Memory Organization -- Locality: The 3rd Wall and The Need for Innovation in Parallel Architectures -- Static extraction of memory access profiles for multi-core interference analysis of real-time tasks -- Transparent Resilience for Approximate DRAM -- Heterogeneous Computing -- Automatic Mapping of Parallel Pattern-based Algorithms on Heterogeneous Architectures -- Assessing and Improving the Suitability of Model-Based Design for GPU-Accelerated Railway Control Systems -- DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model -- Instruction Set Transformations -- Performance Gain of a Data Flow Oriented ISA as Replacement for Java Bytecode -- Towards Transparent Dynamic Binary Translation from RISC-V to a CGRA -- Organic Computing -- An Organic Computing System for Automated Testing -- Evaluating a Priority-Based Task Distribution Strategy for an Artificial Hormone System -- Low Power Design -- Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-Core MCUs -- Energy Efficient Power-Management for Out-of-Order Processors using Cyclic Power-Gating -- VEFRE Workshop -- BCH 2-Bit and 3-Bit Error Correction with Fast Multi-Bit Error Detection -- Evaluating Soft Error Mitigation Trade-offs During Early Design Stages. |
| Record Nr. | UNINA-9910492144003321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems - ARCS 2017 [[electronic resource] ] : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck
| Architecture of Computing Systems - ARCS 2017 [[electronic resource] ] : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck |
| Edizione | [1st ed. 2017.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
| Descrizione fisica | 1 online resource (XIII, 262 p. 100 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-54999-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Resilience -- Accelerators -- Performance -- Memory systems -- Parallelism and many-core -- Scheduling -- Power/energy. |
| Record Nr. | UNISA-996466334103316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems - ARCS 2017 : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck
| Architecture of Computing Systems - ARCS 2017 : 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings / / edited by Jens Knoop, Wolfgang Karl, Martin Schulz, Koji Inoue, Thilo Pionteck |
| Edizione | [1st ed. 2017.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
| Descrizione fisica | 1 online resource (XIII, 262 p. 100 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-54999-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Resilience -- Accelerators -- Performance -- Memory systems -- Parallelism and many-core -- Scheduling -- Power/energy. |
| Record Nr. | UNINA-9910485015603321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems -- ARCS 2016 [[electronic resource] ] : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich
| Architecture of Computing Systems -- ARCS 2016 [[electronic resource] ] : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (XX, 402 p. 164 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-30695-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| Record Nr. | UNISA-996466022303316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems -- ARCS 2016 : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich
| Architecture of Computing Systems -- ARCS 2016 : 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / / edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (XX, 402 p. 164 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Algorithms Software engineering Application software Computer science Computer Communication Networks Computer System Implementation Software Engineering Computer and Information Systems Applications Theory of Computation |
| ISBN | 3-319-30695-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| Record Nr. | UNINA-9910483949703321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architecture of Computing Systems – ARCS 2018 [[electronic resource] ] : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck
| Architecture of Computing Systems – ARCS 2018 [[electronic resource] ] : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (XV, 326 p. 112 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Logic design Operating systems (Computers) Microprocessors Computer architecture Computer systems Computer input-output equipment Computer Communication Networks Logic Design Operating Systems Processor Architectures Computer System Implementation Input/Output and Data Communications |
| ISBN | 3-319-77610-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Embedded Systems -- Multicore Systems -- Analysis and Optimization -- On-Chip and Off-Chip Networks -- Memory Models and Systems -- Energy Ecient Systems -- Partial Reconguration -- Large Scale Computing. |
| Record Nr. | UNISA-996465756303316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Architecture of Computing Systems – ARCS 2018 : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck
| Architecture of Computing Systems – ARCS 2018 : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings / / edited by Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (XV, 326 p. 112 illus.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Logic design Operating systems (Computers) Microprocessors Computer architecture Computer systems Computer input-output equipment Computer Communication Networks Logic Design Operating Systems Processor Architectures Computer System Implementation Input/Output and Data Communications |
| ISBN | 3-319-77610-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Embedded Systems -- Multicore Systems -- Analysis and Optimization -- On-Chip and Off-Chip Networks -- Memory Models and Systems -- Energy Ecient Systems -- Partial Reconguration -- Large Scale Computing. |
| Record Nr. | UNINA-9910349425803321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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