Compiler Optimizations for Scalable Parallel Systems [[electronic resource] ] : Languages, Compilation Techniques, and Run Time Systems / / edited by Santosh Pande, Dharma P. Agrawal |
Edizione | [1st ed. 2001.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 |
Descrizione fisica | 1 online resource (XXVIII, 784 p.) |
Disciplina | 005.453 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Software engineering
Architecture, Computer Programming languages (Electronic computers) Operating systems (Computers) Computer communication systems Computer programming Software Engineering/Programming and Operating Systems Computer System Implementation Programming Languages, Compilers, Interpreters Operating Systems Computer Communication Networks Programming Techniques |
ISBN | 3-540-45403-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Languages -- High Performance Fortran 2.0 -- The Sisal Project: Real World Functional Programming -- HPC++ and the HPC++Lib Toolkit -- A Concurrency Abstraction Model for Avoiding Inheritance Anomaly in Object-Oriented Programs -- Analysis -- Loop Parallelization Algorithms -- Array Dataflow Analysis -- Interprocedural Analysis Based on Guarded Array Regions -- Automatic Array Privatization -- Communication Optimizations -- Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors -- Communication-Free Partitioning of Nested Loops -- Solving Alignment Using Elementary Linear Algebra -- A Compilation Method for Communication-Efficient Partitioning of DOALL Loops -- Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers -- A Framework for Global Communication Analysis and Optimizations -- Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture -- Code Generation -- Advanced Code Generation for High Performance Fortran -- Integer Lattice Based Methods for Local Address Generation for Block-Cyclic Distributions -- Task Parallelism, Dynamic Data Structures and Run Time Systems -- A Duplication Based Compile Time Scheduling Method for Task Parallelism -- SPMD Execution in the Presence of Dynamic Data Structures -- Supporting Dynamic Data Structures with Olden -- Runtime and Compiler Support for Irregular Computations. |
Record Nr. | UNISA-996465855303316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 | ||
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Lo trovi qui: Univ. di Salerno | ||
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Compiler Optimizations for Scalable Parallel Systems : Languages, Compilation Techniques, and Run Time Systems / / edited by Santosh Pande, Dharma P. Agrawal |
Edizione | [1st ed. 2001.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 |
Descrizione fisica | 1 online resource (XXVIII, 784 p.) |
Disciplina | 005.453 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Software engineering
Architecture, Computer Programming languages (Electronic computers) Operating systems (Computers) Computer communication systems Computer programming Software Engineering/Programming and Operating Systems Computer System Implementation Programming Languages, Compilers, Interpreters Operating Systems Computer Communication Networks Programming Techniques |
ISBN | 3-540-45403-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Languages -- High Performance Fortran 2.0 -- The Sisal Project: Real World Functional Programming -- HPC++ and the HPC++Lib Toolkit -- A Concurrency Abstraction Model for Avoiding Inheritance Anomaly in Object-Oriented Programs -- Analysis -- Loop Parallelization Algorithms -- Array Dataflow Analysis -- Interprocedural Analysis Based on Guarded Array Regions -- Automatic Array Privatization -- Communication Optimizations -- Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors -- Communication-Free Partitioning of Nested Loops -- Solving Alignment Using Elementary Linear Algebra -- A Compilation Method for Communication-Efficient Partitioning of DOALL Loops -- Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers -- A Framework for Global Communication Analysis and Optimizations -- Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture -- Code Generation -- Advanced Code Generation for High Performance Fortran -- Integer Lattice Based Methods for Local Address Generation for Block-Cyclic Distributions -- Task Parallelism, Dynamic Data Structures and Run Time Systems -- A Duplication Based Compile Time Scheduling Method for Task Parallelism -- SPMD Execution in the Presence of Dynamic Data Structures -- Supporting Dynamic Data Structures with Olden -- Runtime and Compiler Support for Irregular Computations. |
Record Nr. | UNINA-9910143632803321 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 | ||
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Lo trovi qui: Univ. Federico II | ||
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Languages and Compilers for Parallel Computing [[electronic resource] ] : 32nd International Workshop, LCPC 2019, Atlanta, GA, USA, October 22–24, 2019, Revised Selected Papers / / edited by Santosh Pande, Vivek Sarkar |
Edizione | [1st ed. 2021.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
Descrizione fisica | 1 online resource (175 pages) |
Disciplina | 004.35 |
Collana | Theoretical Computer Science and General Issues |
Soggetto topico |
Compilers (Computer programs)
Computer systems Computer programming Microprocessors Computer architecture Compilers and Interpreters Computer System Implementation Programming Techniques Processor Architectures |
ISBN | 3-030-72789-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor -- PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code -- FLARE: Flexibly Sharing Commodity GPUs to Enforce QoS and Improve Utilization -- Foundations of consistency types for a higher-order distributed language -- Common Subexpression Convergence: A New Code Optimization for SIMT processors -- Using Performance Event Profiles to Deduce an Execution Model of MATLAB with Just-In-Time Compilation -- CLAM: Compiler Leasing of Accelerator Memory -- Abstractions for Polyhedral Topology-Aware Tasking -- SWIRL++: Evaluating Performance Models to Guide Code Transformation in Convolutional Neural Networks -- A Structured Grid Solver with Polyhedral+Dataflow Representation -- CubeGen: Code Generation for Accelerated GEMM-based Convolution with Tiling. |
Record Nr. | UNISA-996464431603316 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
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Lo trovi qui: Univ. di Salerno | ||
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Languages and Compilers for Parallel Computing : 32nd International Workshop, LCPC 2019, Atlanta, GA, USA, October 22–24, 2019, Revised Selected Papers / / edited by Santosh Pande, Vivek Sarkar |
Edizione | [1st ed. 2021.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
Descrizione fisica | 1 online resource (175 pages) |
Disciplina | 004.35 |
Collana | Theoretical Computer Science and General Issues |
Soggetto topico |
Compilers (Computer programs)
Computer systems Computer programming Microprocessors Computer architecture Compilers and Interpreters Computer System Implementation Programming Techniques Processor Architectures |
ISBN | 3-030-72789-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor -- PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code -- FLARE: Flexibly Sharing Commodity GPUs to Enforce QoS and Improve Utilization -- Foundations of consistency types for a higher-order distributed language -- Common Subexpression Convergence: A New Code Optimization for SIMT processors -- Using Performance Event Profiles to Deduce an Execution Model of MATLAB with Just-In-Time Compilation -- CLAM: Compiler Leasing of Accelerator Memory -- Abstractions for Polyhedral Topology-Aware Tasking -- SWIRL++: Evaluating Performance Models to Guide Code Transformation in Convolutional Neural Networks -- A Structured Grid Solver with Polyhedral+Dataflow Representation -- CubeGen: Code Generation for Accelerated GEMM-based Convolution with Tiling. |
Record Nr. | UNINA-9910484181603321 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
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Lo trovi qui: Univ. Federico II | ||
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Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems |
Autore | Hong Seongsoo |
Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2001 |
Descrizione fisica | 1 online resource (250 pages) |
Collana | ACM Conferences |
Soggetto topico |
Electrical & Computer Engineering
Engineering & Applied Sciences Electrical Engineering |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti |
Proceedings of the Association for Computing Machinery Special Interest Group on Programming Languages Workshop on Languages, Compilers and Tools for Embedded Systems
LCTES '01 Workshop on Languages, Compilers and Tools for Embedded Systems 2001 ( co-located with PLDI 2001 ), Snowbird - June 22 - 23, 2001 |
Record Nr. | UNINA-9910376228903321 |
Hong Seongsoo
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[Place of publication not identified], : ACM, 2001 | ||
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Lo trovi qui: Univ. Federico II | ||
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