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Advanced signal processing, circuit and system design techniques for communications
| Advanced signal processing, circuit and system design techniques for communications |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2006 |
| Disciplina | 621.382/2 |
| Soggetto topico |
Signal processing - Design and construction
Integrated circuits Telecommunications Electrical & Computer Engineering Engineering & Applied Sciences |
| ISBN | 1-5090-9414-8 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996201771603316 |
| [Place of publication not identified], : IEEE, 2006 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Advanced signal processing, circuit and system design techniques for communications
| Advanced signal processing, circuit and system design techniques for communications |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2006 |
| Disciplina | 621.382/2 |
| Soggetto topico |
Signal processing - Design and construction
Integrated circuits Telecommunications Electrical & Computer Engineering Engineering & Applied Sciences |
| ISBN | 1-5090-9414-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910142664803321 |
| [Place of publication not identified], : IEEE, 2006 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Integrated Circuit and System Design [[electronic resource] ] : Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings / / edited by Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou
| Integrated Circuit and System Design [[electronic resource] ] : Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings / / edited by Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou |
| Edizione | [1st ed. 2004.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 |
| Descrizione fisica | 1 online resource (XVI, 916 p.) |
| Disciplina | 621.3815 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Electronics
Microelectronics Computers Logic design Computer software—Reusability Microprocessors Arithmetic and logic units, Computer Electronics and Microelectronics, Instrumentation Theory of Computation Logic Design Performance and Reliability Processor Architectures Arithmetic and Logic Structures |
| ISBN | 3-540-30205-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Keynote Speech -- Invited Talks -- Embedded Tutorials -- Session 1: Buses and Communication -- Session 2: Circuits and Devices (I) -- Session 3: Low Power (I) -- Session 4: Architectures -- Session 5: Asynchronous Circuits -- Session 6: System Design -- Session 7: Circuits and Devices (II) -- Session 8: Interconnect and Physical Design -- Session 9: Security and Safety -- Session 10: Low Power (II) -- Session 11: Low-Power Processing (Poster) -- Session 12: Digital Design (Poster) -- Session 13: Modeling and Simulation (Poster). |
| Record Nr. | UNISA-996465311503316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Integrated Circuit and System Design [[electronic resource] ] : Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings / / edited by Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou
| Integrated Circuit and System Design [[electronic resource] ] : Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings / / edited by Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou |
| Edizione | [1st ed. 2004.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 |
| Descrizione fisica | 1 online resource (XVI, 916 p.) |
| Disciplina | 621.3815 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Electronics
Microelectronics Computers Logic design Computer software—Reusability Microprocessors Arithmetic and logic units, Computer Electronics and Microelectronics, Instrumentation Theory of Computation Logic Design Performance and Reliability Processor Architectures Arithmetic and Logic Structures |
| ISBN | 3-540-30205-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Keynote Speech -- Invited Talks -- Embedded Tutorials -- Session 1: Buses and Communication -- Session 2: Circuits and Devices (I) -- Session 3: Low Power (I) -- Session 4: Architectures -- Session 5: Asynchronous Circuits -- Session 6: System Design -- Session 7: Circuits and Devices (II) -- Session 8: Interconnect and Physical Design -- Session 9: Security and Safety -- Session 10: Low Power (II) -- Session 11: Low-Power Processing (Poster) -- Session 12: Digital Design (Poster) -- Session 13: Modeling and Simulation (Poster). |
| Record Nr. | UNINA-9910144348803321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation [[electronic resource] ] : 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings / / edited by Vassilis Paliouras, Johan Vounckx, Diederik Verkest
| Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation [[electronic resource] ] : 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings / / edited by Vassilis Paliouras, Johan Vounckx, Diederik Verkest |
| Edizione | [1st ed. 2005.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005 |
| Descrizione fisica | 1 online resource (XVI, 756 p.) |
| Disciplina | 621.395 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Logic design
Computer software—Reusability Microprocessors Arithmetic and logic units, Computer Computer-aided engineering Electrical engineering Logic Design Performance and Reliability Processor Architectures Arithmetic and Logic Structures Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Session 1: Low-Power Processors -- Session 2: Code Optimization for Low-Power -- Session 3: High-Level Design -- Session 4: Telecommunications and Signal Processing -- Session 5: Low-Power Circuits -- Session 6: System-on-Chip Design -- Session 7: Busses and Interconnections -- Session 8: Modeling -- Session 9: Design Automation -- Session 10: Low-Power Techniques -- Session 11: Memory and Register Files -- Poster Session 1: Applications -- Poster Session 2: Digital Circuits -- Poster Session 3: Analog and Physical Design -- Special Session: Digital Hearing Aids: Challenges and Solutions for Ultra Low Power -- Invited Talks. |
| Record Nr. | UNISA-996465848503316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation [[electronic resource] ] : 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings / / edited by Vassilis Paliouras, Johan Vounckx, Diederik Verkest
| Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation [[electronic resource] ] : 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings / / edited by Vassilis Paliouras, Johan Vounckx, Diederik Verkest |
| Edizione | [1st ed. 2005.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005 |
| Descrizione fisica | 1 online resource (XVI, 756 p.) |
| Disciplina | 621.395 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Logic design
Computer software—Reusability Microprocessors Arithmetic and logic units, Computer Computer-aided engineering Electrical engineering Logic Design Performance and Reliability Processor Architectures Arithmetic and Logic Structures Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Session 1: Low-Power Processors -- Session 2: Code Optimization for Low-Power -- Session 3: High-Level Design -- Session 4: Telecommunications and Signal Processing -- Session 5: Low-Power Circuits -- Session 6: System-on-Chip Design -- Session 7: Busses and Interconnections -- Session 8: Modeling -- Session 9: Design Automation -- Session 10: Low-Power Techniques -- Session 11: Memory and Register Files -- Poster Session 1: Applications -- Poster Session 2: Digital Circuits -- Poster Session 3: Analog and Physical Design -- Special Session: Digital Hearing Aids: Challenges and Solutions for Ultra Low Power -- Invited Talks. |
| Record Nr. | UNINA-9910482997703321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||