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MARC Lista (tabellare)
Cryptographic Hardware and Embedded Systems - CHES 2000 [[electronic resource] ] : Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings / / edited by Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2000 [[electronic resource] ] : Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings / / edited by Cetin K. Koc, Christof Paar
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XII, 360 p.)
Disciplina 005.8/2
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Logic design
Computer science—Mathematics
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Logic Design
Discrete Mathematics in Computer Science
ISBN 3-540-44499-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- Software Implementation of Elliptic Curve Cryptography over Binary Fields -- Implementation of Elliptic Curve Cryptosystems -- Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA -- A High-Performance Reconfigurable Elliptic Curve Processor for GF(2m) -- Fast Implementation of Elliptic Curve Defined over GF(pm) on CalmRISC with MAC2424 Coprocessor -- Power and Timing Analysis Attacks -- Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies -- Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards -- Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems -- A Timing Attack against RSA with the Chinese Remainder Theorem -- Hardware Implementation of Block Ciphers -- A Comparative Study of Performance of AES Final Candidates Using FPGAs -- A Dynamic FPGA Implementation of the Serpent Block Cipher -- A 12 Gbps DES Encryptor/Decryptor Core in an FPGA -- A 155 Mbps Triple-DES Network Encryptor -- Hardware Architectures -- An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture -- High-Speed RSA Hardware Based on Barret’s Modular Reduction Method -- Data Integrity in Hardware for Modular Arithmetic -- A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals -- Invited Talk -- How to Explain Side-Channel Leakage to Your Kids -- Power Analysis Attacks -- On Boolean and Arithmetic Masking against Differential Power Analysis -- Using Second-Order Power Analysis to Attack DPA Resistant Software -- Differential Power Analysis in the Presence of Hardware Countermeasures -- Arithmetic Architectures -- Montgomery Multiplier and Squarer in GF(2m) -- A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m) -- Montgomery Exponentiation with no Final Subtractions: Improved Results -- Physical Security and Cryptanalysis -- Physical Security Devices for Computer Subsystems: A Survey of Attacks and Defenses -- Software-Hardware Trade-Offs: Application to A5/1 Cryptanalysis -- New Schemes and Algorithms -- MiniPASS: Authentication and Digital Signatures in a Constrained Environment -- Efficient Generation of Prime Numbers.
Record Nr. UNINA-9910143609103321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems - CHES 2000 [[electronic resource] ] : Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings / / edited by Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2000 [[electronic resource] ] : Second International Workshop Worcester, MA, USA, August 17-18, 2000 Proceedings / / edited by Cetin K. Koc, Christof Paar
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XII, 360 p.)
Disciplina 005.8/2
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Logic design
Computer science—Mathematics
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Logic Design
Discrete Mathematics in Computer Science
ISBN 3-540-44499-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- Software Implementation of Elliptic Curve Cryptography over Binary Fields -- Implementation of Elliptic Curve Cryptosystems -- Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA -- A High-Performance Reconfigurable Elliptic Curve Processor for GF(2m) -- Fast Implementation of Elliptic Curve Defined over GF(pm) on CalmRISC with MAC2424 Coprocessor -- Power and Timing Analysis Attacks -- Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies -- Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards -- Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems -- A Timing Attack against RSA with the Chinese Remainder Theorem -- Hardware Implementation of Block Ciphers -- A Comparative Study of Performance of AES Final Candidates Using FPGAs -- A Dynamic FPGA Implementation of the Serpent Block Cipher -- A 12 Gbps DES Encryptor/Decryptor Core in an FPGA -- A 155 Mbps Triple-DES Network Encryptor -- Hardware Architectures -- An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture -- High-Speed RSA Hardware Based on Barret’s Modular Reduction Method -- Data Integrity in Hardware for Modular Arithmetic -- A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals -- Invited Talk -- How to Explain Side-Channel Leakage to Your Kids -- Power Analysis Attacks -- On Boolean and Arithmetic Masking against Differential Power Analysis -- Using Second-Order Power Analysis to Attack DPA Resistant Software -- Differential Power Analysis in the Presence of Hardware Countermeasures -- Arithmetic Architectures -- Montgomery Multiplier and Squarer in GF(2m) -- A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m) -- Montgomery Exponentiation with no Final Subtractions: Improved Results -- Physical Security and Cryptanalysis -- Physical Security Devices for Computer Subsystems: A Survey of Attacks and Defenses -- Software-Hardware Trade-Offs: Application to A5/1 Cryptanalysis -- New Schemes and Algorithms -- MiniPASS: Authentication and Digital Signatures in a Constrained Environment -- Efficient Generation of Prime Numbers.
Record Nr. UNISA-996466181603316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems - CHES 2001 [[electronic resource] ] : Third International Workshop, Paris, France, May 14-16, 2001 Proceedings / / edited by Cetin K. Koc, David Nacchae, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2001 [[electronic resource] ] : Third International Workshop, Paris, France, May 14-16, 2001 Proceedings / / edited by Cetin K. Koc, David Nacchae, Christof Paar
Edizione [1st ed. 2001.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001
Descrizione fisica 1 online resource (XIV, 418 p.)
Disciplina 005.8/2
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Logic design
Management information systems
Computer science
Operating systems (Computers)
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Logic Design
Management of Computing and Information Systems
Operating Systems
ISBN 3-540-44709-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- Protecting Embedded Systems— The Next Ten Years -- Side Channel Attacks I -- A Sound Method for Switching between Boolean and Arithmetic Masking -- Fast Primitives for Internal Data Scrambling in Tamper Resistant Hardware -- Random Register Renaming to Foil DPA -- Randomized Addition-Subtraction Chains as a Countermeasure against Power Attacks -- Rijndael Hardware Implementations -- Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm -- High Performance Single-Chip FPGA Rijndael Algorithm Implementations -- Two Methods of Rijndael Implementation in Reconfigurable Hardware -- Random Number Generators -- Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor -- Efficient Online Tests for True Random Number Generators -- Elliptic Curve Algorithms -- The Hessian Form of an Elliptic Curve -- Efficient Elliptic Curve Cryptosystems from a Scalar Multiplication Algorithm with Recovery of the y-Coordinate on a Montgomery-Form Elliptic Curve -- Generating Elliptic Curves of Prime Order -- Invited Talk -- New Directions in Croptography -- Arithmetic Architectures -- A New Low Complexity Parallel Multiplier for a Class of Finite Fields -- Efficient Rijndael Encryption Implementation with Composite Field Arithmetic -- High-Radix Design of a Scalable Modular Multiplier -- A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m) -- Cryptanalysis -- Attacks on Cryptoprocessor Transaction Sets -- Bandwidth-Optimal Kleptographic Attacks -- Electromagnetic Analysis: Concrete Results -- Embedded Implementations and New Ciphers -- NTRU in Constrained Devices -- Transparent Harddisk Encryption -- Side Channel Attacks II -- Sliding Windows Succumbs to Big Mac Attack -- Universal Exponentiation Algorithm A First Step towards Provable SPA-Resistance -- An Implementation of DES and AES, Secure against Some Attacks -- Hardware Implementations of Ciphers -- Efficient Implementation of “Large” Stream Cipher Systems -- Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA -- A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware -- Implementation of RSA Algorithm Based on RNS Montgomery Multiplication -- Side Channel Attacks on Elliptic Curve Cryptosystems -- Protections against Differential Analysis for Elliptic Curve Cryptography — An Algebraic Approach — -- Preventing SPA/DPA in ECC Systems Using the Jacobi Form -- Hessian Elliptic Curves and Side-Channel Attacks.
Record Nr. UNINA-9910143626003321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems - CHES 2001 [[electronic resource] ] : Third International Workshop, Paris, France, May 14-16, 2001 Proceedings / / edited by Cetin K. Koc, David Nacchae, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2001 [[electronic resource] ] : Third International Workshop, Paris, France, May 14-16, 2001 Proceedings / / edited by Cetin K. Koc, David Nacchae, Christof Paar
Edizione [1st ed. 2001.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001
Descrizione fisica 1 online resource (XIV, 418 p.)
Disciplina 005.8/2
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Logic design
Management information systems
Computer science
Operating systems (Computers)
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Logic Design
Management of Computing and Information Systems
Operating Systems
ISBN 3-540-44709-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- Protecting Embedded Systems— The Next Ten Years -- Side Channel Attacks I -- A Sound Method for Switching between Boolean and Arithmetic Masking -- Fast Primitives for Internal Data Scrambling in Tamper Resistant Hardware -- Random Register Renaming to Foil DPA -- Randomized Addition-Subtraction Chains as a Countermeasure against Power Attacks -- Rijndael Hardware Implementations -- Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm -- High Performance Single-Chip FPGA Rijndael Algorithm Implementations -- Two Methods of Rijndael Implementation in Reconfigurable Hardware -- Random Number Generators -- Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor -- Efficient Online Tests for True Random Number Generators -- Elliptic Curve Algorithms -- The Hessian Form of an Elliptic Curve -- Efficient Elliptic Curve Cryptosystems from a Scalar Multiplication Algorithm with Recovery of the y-Coordinate on a Montgomery-Form Elliptic Curve -- Generating Elliptic Curves of Prime Order -- Invited Talk -- New Directions in Croptography -- Arithmetic Architectures -- A New Low Complexity Parallel Multiplier for a Class of Finite Fields -- Efficient Rijndael Encryption Implementation with Composite Field Arithmetic -- High-Radix Design of a Scalable Modular Multiplier -- A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m) -- Cryptanalysis -- Attacks on Cryptoprocessor Transaction Sets -- Bandwidth-Optimal Kleptographic Attacks -- Electromagnetic Analysis: Concrete Results -- Embedded Implementations and New Ciphers -- NTRU in Constrained Devices -- Transparent Harddisk Encryption -- Side Channel Attacks II -- Sliding Windows Succumbs to Big Mac Attack -- Universal Exponentiation Algorithm A First Step towards Provable SPA-Resistance -- An Implementation of DES and AES, Secure against Some Attacks -- Hardware Implementations of Ciphers -- Efficient Implementation of “Large” Stream Cipher Systems -- Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA -- A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware -- Implementation of RSA Algorithm Based on RNS Montgomery Multiplication -- Side Channel Attacks on Elliptic Curve Cryptosystems -- Protections against Differential Analysis for Elliptic Curve Cryptography — An Algebraic Approach — -- Preventing SPA/DPA in ECC Systems Using the Jacobi Form -- Hessian Elliptic Curves and Side-Channel Attacks.
Record Nr. UNISA-996465812103316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems - CHES 2002 [[electronic resource] ] : 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers / / edited by Burton S. Jr. Kaliski, Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2002 [[electronic resource] ] : 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers / / edited by Burton S. Jr. Kaliski, Cetin K. Koc, Christof Paar
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 618 p.)
Disciplina 005.8
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Operating systems (Computers)
Computer science—Mathematics
Management information systems
Computer science
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Operating Systems
Discrete Mathematics in Computer Science
Management of Computing and Information Systems
ISBN 3-540-36400-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- CHES: Past, Present, and Future -- Attack Strategies -- Optical Fault Induction Attacks -- Template Attacks -- The EM Side—Channel(s) -- Finite Field and Modular Arithmetic I -- Enhanced Montgomery Multiplication -- New Algorithm for Classical Modular Inverse -- Increasing the Bitlength of a Crypto-Coprocessor -- Elliptic Curve Cryptography I -- Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems -- Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks -- Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor -- Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA -- AES and AES Candidates -- 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis -- Efficient Software Implementation of AES on 32-Bit Platforms -- An Optimized S-Box Circuit Architecture for Low Power AES Design -- Simplified Adaptive Multiplicative Masking for AES -- Multiplicative Masking and Power Analysis of AES -- Tamper Resistance -- Keeping Secrets in Hardware: The Microsoft XboxTM Case Study -- RSA Implementation -- A DPA Attack against the Modular Reduction within a CRT Implementation of RSA -- Further Results and Considerations on Side Channel Attacks on RSA -- Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures -- Finite Field and Modular Arithmetic II -- Some Security Aspects of the MIST Randomized Exponentiation Algorithm -- The Montgomery Powering Ladder -- DPA Countermeasures by Improving the Window Method -- Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions -- Elliptic Curve Cryptography II -- On the Efficient Generation of Elliptic Curves over Prime Fields -- An End-to-End Systems Approach to Elliptic Curve Cryptography -- A Low-Power Design for an Elliptic Curve Digital Signature Chip -- A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over -- Genus Two Hyperelliptic Curve Coprocessor -- Random Number Generation -- True Random Number Generator Embedded in Reconfigurable Hardware -- Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications -- A Hardware Random Number Generator -- Invited Talk -- RFID Systems and Security and Privacy Implications -- New Primitives -- A New Class of Invertible Mappings -- Finite Field and Modular Arithmetic II -- Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n) -- Dual-Field Arithmetic Unit for GF(p) and GF(2m) -- Error Detection in Polynomial Basis Multipliers over Binary Extension Fields -- Hardware Implementation of Finite Fields of Characteristic Three -- Elliptic Curve Cryptography III -- Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication -- Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks -- Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick -- Hardware for Cryptanalysis -- Experience Using a Low-Cost FPGA Design to Crack DES Keys -- A Time-Memory Tradeo. Using Distinguished Points: New Analysis & FPGA Results.
Record Nr. UNINA-9910143886003321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems - CHES 2002 [[electronic resource] ] : 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers / / edited by Burton S. Jr. Kaliski, Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems - CHES 2002 [[electronic resource] ] : 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers / / edited by Burton S. Jr. Kaliski, Cetin K. Koc, Christof Paar
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 618 p.)
Disciplina 005.8
Collana Lecture Notes in Computer Science
Soggetto topico Data encryption (Computer science)
Computer communication systems
Special purpose computers
Operating systems (Computers)
Computer science—Mathematics
Management information systems
Computer science
Cryptology
Computer Communication Networks
Special Purpose and Application-Based Systems
Operating Systems
Discrete Mathematics in Computer Science
Management of Computing and Information Systems
ISBN 3-540-36400-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- CHES: Past, Present, and Future -- Attack Strategies -- Optical Fault Induction Attacks -- Template Attacks -- The EM Side—Channel(s) -- Finite Field and Modular Arithmetic I -- Enhanced Montgomery Multiplication -- New Algorithm for Classical Modular Inverse -- Increasing the Bitlength of a Crypto-Coprocessor -- Elliptic Curve Cryptography I -- Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems -- Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks -- Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor -- Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA -- AES and AES Candidates -- 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis -- Efficient Software Implementation of AES on 32-Bit Platforms -- An Optimized S-Box Circuit Architecture for Low Power AES Design -- Simplified Adaptive Multiplicative Masking for AES -- Multiplicative Masking and Power Analysis of AES -- Tamper Resistance -- Keeping Secrets in Hardware: The Microsoft XboxTM Case Study -- RSA Implementation -- A DPA Attack against the Modular Reduction within a CRT Implementation of RSA -- Further Results and Considerations on Side Channel Attacks on RSA -- Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures -- Finite Field and Modular Arithmetic II -- Some Security Aspects of the MIST Randomized Exponentiation Algorithm -- The Montgomery Powering Ladder -- DPA Countermeasures by Improving the Window Method -- Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions -- Elliptic Curve Cryptography II -- On the Efficient Generation of Elliptic Curves over Prime Fields -- An End-to-End Systems Approach to Elliptic Curve Cryptography -- A Low-Power Design for an Elliptic Curve Digital Signature Chip -- A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over -- Genus Two Hyperelliptic Curve Coprocessor -- Random Number Generation -- True Random Number Generator Embedded in Reconfigurable Hardware -- Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications -- A Hardware Random Number Generator -- Invited Talk -- RFID Systems and Security and Privacy Implications -- New Primitives -- A New Class of Invertible Mappings -- Finite Field and Modular Arithmetic II -- Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n) -- Dual-Field Arithmetic Unit for GF(p) and GF(2m) -- Error Detection in Polynomial Basis Multipliers over Binary Extension Fields -- Hardware Implementation of Finite Fields of Characteristic Three -- Elliptic Curve Cryptography III -- Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication -- Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks -- Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick -- Hardware for Cryptanalysis -- Experience Using a Low-Cost FPGA Design to Crack DES Keys -- A Time-Memory Tradeo. Using Distinguished Points: New Analysis & FPGA Results.
Record Nr. UNISA-996465493203316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems -- CHES 2003 [[electronic resource] ] : 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings / / edited by Colin D. Walter, Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems -- CHES 2003 [[electronic resource] ] : 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings / / edited by Colin D. Walter, Cetin K. Koc, Christof Paar
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 446 p.)
Disciplina 005.8
Collana Lecture Notes in Computer Science
Soggetto topico Computer communication systems
Data encryption (Computer science)
Logic design
Special purpose computers
Operating systems (Computers)
Computer science—Mathematics
Computer Communication Networks
Cryptology
Logic Design
Special Purpose and Application-Based Systems
Operating Systems
Discrete Mathematics in Computer Science
ISBN 3-540-45238-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- The Security Challenges of Ubiquitous Computing -- Side Channel Attack Methodology -- Multi-channel Attacks -- Hidden Markov Model Cryptanalysis -- Power-Analysis Attacks on an FPGA – First Experimental Results -- Hardware Factorization -- Hardware to Solve Sparse Systems of Linear Equations over GF(2) -- Symmetric Ciphers: Side Channel Attacks and Countermeasures -- Cryptanalysis of DES Implemented on Computers with Cache -- A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad -- A New Algorithm for Switching from Arithmetic to Boolean Masking -- DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits -- Secure Hardware Logic -- Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers -- Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology -- Security Evaluation of Asynchronous Circuits -- Random Number Generators -- Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts -- True Random Number Generators Secure in a Changing Environment -- How to Predict the Output of a Hardware Random Number Generator -- Efficient Multiplication -- On Low Complexity Bit Parallel Polynomial Basis Multipliers -- Efficient Modular Reduction Algorithm in [x] and Its Application to “Left to Right” Modular Multiplication in [x] -- Faster Double-Size Modular Multiplication from Euclidean Multipliers -- More on Efficient Arithmetic -- Efficient Exponentiation for a Class of Finite Fields GF(2 n ) Determined by Gauss Periods -- GCD-Free Algorithms for Computing Modular Inverses -- Attacks on Asymmetric Cryptosystems -- Attacking Unbalanced RSA-CRT Using SPA -- The Doubling Attack – Why Upwards Is Better than Downwards -- An Analysis of Goubin’s Refined Power Analysis Attack -- A New Type of Timing Attack: Application to GPS -- Implementation of Symmetric Ciphers -- Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia -- Very Compact FPGA Implementation of the AES Algorithm -- Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs -- Hyperelliptic Curve Cryptography -- Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves -- Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems -- Countermeasures to Side Channel Leakage -- A Practical Countermeasure against Address-Bit Differential Power Analysis -- A More Flexible Countermeasure against Side Channel Attacks Using Window Method -- Security of Standards -- On the Security of PKCS #11 -- Attacking RSA-Based Sessions in SSL/TLS.
Record Nr. UNINA-9910208851903321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Cryptographic Hardware and Embedded Systems -- CHES 2003 [[electronic resource] ] : 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings / / edited by Colin D. Walter, Cetin K. Koc, Christof Paar
Cryptographic Hardware and Embedded Systems -- CHES 2003 [[electronic resource] ] : 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings / / edited by Colin D. Walter, Cetin K. Koc, Christof Paar
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 446 p.)
Disciplina 005.8
Collana Lecture Notes in Computer Science
Soggetto topico Computer communication systems
Data encryption (Computer science)
Logic design
Special purpose computers
Operating systems (Computers)
Computer science—Mathematics
Computer Communication Networks
Cryptology
Logic Design
Special Purpose and Application-Based Systems
Operating Systems
Discrete Mathematics in Computer Science
ISBN 3-540-45238-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talk -- The Security Challenges of Ubiquitous Computing -- Side Channel Attack Methodology -- Multi-channel Attacks -- Hidden Markov Model Cryptanalysis -- Power-Analysis Attacks on an FPGA – First Experimental Results -- Hardware Factorization -- Hardware to Solve Sparse Systems of Linear Equations over GF(2) -- Symmetric Ciphers: Side Channel Attacks and Countermeasures -- Cryptanalysis of DES Implemented on Computers with Cache -- A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad -- A New Algorithm for Switching from Arithmetic to Boolean Masking -- DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits -- Secure Hardware Logic -- Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers -- Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology -- Security Evaluation of Asynchronous Circuits -- Random Number Generators -- Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts -- True Random Number Generators Secure in a Changing Environment -- How to Predict the Output of a Hardware Random Number Generator -- Efficient Multiplication -- On Low Complexity Bit Parallel Polynomial Basis Multipliers -- Efficient Modular Reduction Algorithm in [x] and Its Application to “Left to Right” Modular Multiplication in [x] -- Faster Double-Size Modular Multiplication from Euclidean Multipliers -- More on Efficient Arithmetic -- Efficient Exponentiation for a Class of Finite Fields GF(2 n ) Determined by Gauss Periods -- GCD-Free Algorithms for Computing Modular Inverses -- Attacks on Asymmetric Cryptosystems -- Attacking Unbalanced RSA-CRT Using SPA -- The Doubling Attack – Why Upwards Is Better than Downwards -- An Analysis of Goubin’s Refined Power Analysis Attack -- A New Type of Timing Attack: Application to GPS -- Implementation of Symmetric Ciphers -- Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia -- Very Compact FPGA Implementation of the AES Algorithm -- Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs -- Hyperelliptic Curve Cryptography -- Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves -- Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems -- Countermeasures to Side Channel Leakage -- A Practical Countermeasure against Address-Bit Differential Power Analysis -- A More Flexible Countermeasure against Side Channel Attacks Using Window Method -- Security of Standards -- On the Security of PKCS #11 -- Attacking RSA-Based Sessions in SSL/TLS.
Record Nr. UNISA-996466472803316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. di Salerno
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Security in Ad-hoc and Sensor Networks [[electronic resource] ] : First European Workshop, ESAS 2004, Heidelberg, Germany, August 6, 2004, Revised Selected Papers / / edited by Claude Castelluccia, Hannes Hartenstein, Christof Paar, Dirk Westhoff
Security in Ad-hoc and Sensor Networks [[electronic resource] ] : First European Workshop, ESAS 2004, Heidelberg, Germany, August 6, 2004, Revised Selected Papers / / edited by Claude Castelluccia, Hannes Hartenstein, Christof Paar, Dirk Westhoff
Edizione [1st ed. 2005.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Descrizione fisica 1 online resource (VIII, 231 p.)
Disciplina 005.82
Collana Computer Communication Networks and Telecommunications
Soggetto topico Data encryption (Computer science)
Computer communication systems
Algorithms
Management information systems
Computer science
Application software
Electrical engineering
Cryptology
Computer Communication Networks
Algorithm Analysis and Problem Complexity
Management of Computing and Information Systems
Information Systems Applications (incl. Internet)
Communications Engineering, Networks
ISBN 3-540-30496-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto New Research Challenges for the Security of Ad Hoc and Sensor Networks -- Public Key Cryptography in Sensor Networks—Revisited -- Exploring Message Authentication in Sensor Networks -- Secure Initialization in Single-Hop Radio Networks -- Some Methods for Privacy in RFID Communication -- Ring Signature Schemes for General Ad-Hoc Access Structures -- Linking Ad Hoc Charging Schemes to AAAC Architectures -- Blind Spontaneous Anonymous Group Signatures for Ad Hoc Groups -- Security for Interactions in Pervasive Networks: Applicability of Recommendation Systems -- Pseudonym Generation Scheme for Ad-Hoc Group Communication Based on IDH -- Secure Overlay for Service Centric Wireless Sensor Networks -- IKE in Ad-Hoc IP Networking -- Advanced Detection of Selfish or Malicious Nodes in Ad Hoc Networks -- A Security Architecture for Mobile Wireless Sensor Networks -- Securely Propagating Authentication in an Ensemble of Personal Devices Using Single Sign-on -- Key Management in Wireless Sensor Networks -- SDD: Secure Directed Diffusion Protocol for Sensor Networks -- Secure AES Hardware Module for Resource Constrained Devices.
Record Nr. UNISA-996466018403316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Security in Ad-hoc and Sensor Networks [[electronic resource] ] : First European Workshop, ESAS 2004, Heidelberg, Germany, August 6, 2004, Revised Selected Papers / / edited by Claude Castelluccia, Hannes Hartenstein, Christof Paar, Dirk Westhoff
Security in Ad-hoc and Sensor Networks [[electronic resource] ] : First European Workshop, ESAS 2004, Heidelberg, Germany, August 6, 2004, Revised Selected Papers / / edited by Claude Castelluccia, Hannes Hartenstein, Christof Paar, Dirk Westhoff
Edizione [1st ed. 2005.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Descrizione fisica 1 online resource (VIII, 231 p.)
Disciplina 005.82
Collana Computer Communication Networks and Telecommunications
Soggetto topico Data encryption (Computer science)
Computer communication systems
Algorithms
Management information systems
Computer science
Application software
Electrical engineering
Cryptology
Computer Communication Networks
Algorithm Analysis and Problem Complexity
Management of Computing and Information Systems
Information Systems Applications (incl. Internet)
Communications Engineering, Networks
ISBN 3-540-30496-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto New Research Challenges for the Security of Ad Hoc and Sensor Networks -- Public Key Cryptography in Sensor Networks—Revisited -- Exploring Message Authentication in Sensor Networks -- Secure Initialization in Single-Hop Radio Networks -- Some Methods for Privacy in RFID Communication -- Ring Signature Schemes for General Ad-Hoc Access Structures -- Linking Ad Hoc Charging Schemes to AAAC Architectures -- Blind Spontaneous Anonymous Group Signatures for Ad Hoc Groups -- Security for Interactions in Pervasive Networks: Applicability of Recommendation Systems -- Pseudonym Generation Scheme for Ad-Hoc Group Communication Based on IDH -- Secure Overlay for Service Centric Wireless Sensor Networks -- IKE in Ad-Hoc IP Networking -- Advanced Detection of Selfish or Malicious Nodes in Ad Hoc Networks -- A Security Architecture for Mobile Wireless Sensor Networks -- Securely Propagating Authentication in an Ensemble of Personal Devices Using Single Sign-on -- Key Management in Wireless Sensor Networks -- SDD: Secure Directed Diffusion Protocol for Sensor Networks -- Secure AES Hardware Module for Resource Constrained Devices.
Record Nr. UNINA-9910484960403321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
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