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Communicating process architectures 2007 [[electronic resource] ] : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.]
| Communicating process architectures 2007 [[electronic resource] ] : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.] |
| Pubbl/distr/stampa | Amsterdam ; Fairfax, VA, : IOS Press, 2007 |
| Descrizione fisica | 1 online resource (528 p.) |
| Disciplina | 004 |
| Altri autori (Persone) | McEwanAlistair A |
| Collana | Concurrent systems engineering series |
| Soggetto topico |
Parallel processing (Electronic computers)
occam (Computer program language) Transputers Computer architecture |
| Soggetto genere / forma | Electronic books. |
| ISBN |
6611029842
1-281-02984-X 9786611029845 1-60750-261-5 600-00-0368-4 1-4356-0867-4 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Title page; Preface; Programme Committee; Additional Reviewers; Contents; Fine-Grain Concurrency; Communicating Process Architecture for Multicores; Lazy Exploration and Checking of CSP Models with CSPsim; The Core Language of Aldwych; JCSProB: Implementing Integrated Formal Specifications in Concurrent Java; Components with Symbolic Transition Systems: A Java Implementation of Rendezvous; Concurrent/Reactive System Design with Honeysuckle; CSP and Real-Time: Reality or Illusion?; Testing and Sampling Parallel Systems; Mobility in JCSP: New Mobile Channel and Mobile Process Models
C++CSP2: A Many-to-Many Threading Model for Multicore ArchitecturesDesign Principles of the SystemCSP Software Framework; PyCSP - Communicating Sequential Processes for Python; A Process-Oriented Architecture for Complex System Modelling; Concurrency Control and Recovery Management for Open e-Business Transactions; trancell - An Experimental ETC to Cell BE Translator; A Versatile Hardware-Software Platform for In-Situ Monitoring Systems; High Cohesion and Low Coupling: The Office Mapping Factor; A Process Oriented Approach to USB Driver Development A Native Transterpreter for the LEGO Mindstorms RCXIntegrating and Extending JCSP; Hardware/Software Synthesis and Verification Using Esterel; Modeling and Analysis of the AMBA Bus Using CSP and B; A Step Towards Refining and Translating B Control Annotations to Handel-C; Towards the Formal Verification of a Java Processor in Event-B; Advanced System Simulation, Emulation and Test (ASSET); Development of a Family of Multi-Core Devices Using Hierarchical Abstraction; Domain Specific Transformations for Hardware Ray Tracing A Reconfigurable System-on-Chip Architecture for Pico-Satellite MissionsTransactional CSP Processes; Algebras of Actions in Concurrent Processes; Using occam-pi Primitives with the Cell Broadband Engine; Shared-Memory Multi-Processor Scheduling Algorithms for CCSP; Compiling occam to C with Tock; Author Index |
| Record Nr. | UNINA-9910451878903321 |
| Amsterdam ; Fairfax, VA, : IOS Press, 2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Communicating process architectures 2007 [[electronic resource] ] : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.]
| Communicating process architectures 2007 [[electronic resource] ] : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.] |
| Pubbl/distr/stampa | Amsterdam ; Fairfax, VA, : IOS Press, 2007 |
| Descrizione fisica | 1 online resource (528 p.) |
| Disciplina | 004 |
| Altri autori (Persone) | McEwanAlistair A |
| Collana | Concurrent systems engineering series |
| Soggetto topico |
Parallel processing (Electronic computers)
occam (Computer program language) Transputers Computer architecture |
| ISBN |
6611029842
1-281-02984-X 9786611029845 1-60750-261-5 600-00-0368-4 1-4356-0867-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Title page; Preface; Programme Committee; Additional Reviewers; Contents; Fine-Grain Concurrency; Communicating Process Architecture for Multicores; Lazy Exploration and Checking of CSP Models with CSPsim; The Core Language of Aldwych; JCSProB: Implementing Integrated Formal Specifications in Concurrent Java; Components with Symbolic Transition Systems: A Java Implementation of Rendezvous; Concurrent/Reactive System Design with Honeysuckle; CSP and Real-Time: Reality or Illusion?; Testing and Sampling Parallel Systems; Mobility in JCSP: New Mobile Channel and Mobile Process Models
C++CSP2: A Many-to-Many Threading Model for Multicore ArchitecturesDesign Principles of the SystemCSP Software Framework; PyCSP - Communicating Sequential Processes for Python; A Process-Oriented Architecture for Complex System Modelling; Concurrency Control and Recovery Management for Open e-Business Transactions; trancell - An Experimental ETC to Cell BE Translator; A Versatile Hardware-Software Platform for In-Situ Monitoring Systems; High Cohesion and Low Coupling: The Office Mapping Factor; A Process Oriented Approach to USB Driver Development A Native Transterpreter for the LEGO Mindstorms RCXIntegrating and Extending JCSP; Hardware/Software Synthesis and Verification Using Esterel; Modeling and Analysis of the AMBA Bus Using CSP and B; A Step Towards Refining and Translating B Control Annotations to Handel-C; Towards the Formal Verification of a Java Processor in Event-B; Advanced System Simulation, Emulation and Test (ASSET); Development of a Family of Multi-Core Devices Using Hierarchical Abstraction; Domain Specific Transformations for Hardware Ray Tracing A Reconfigurable System-on-Chip Architecture for Pico-Satellite MissionsTransactional CSP Processes; Algebras of Actions in Concurrent Processes; Using occam-pi Primitives with the Cell Broadband Engine; Shared-Memory Multi-Processor Scheduling Algorithms for CCSP; Compiling occam to C with Tock; Author Index |
| Record Nr. | UNINA-9910778106803321 |
| Amsterdam ; Fairfax, VA, : IOS Press, 2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Communicating process architectures 2007 : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.]
| Communicating process architectures 2007 : WoTUG-30 : proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United Kingdom / / edited by Alistair A. McEwan ... [et al.] |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Amsterdam ; Fairfax, VA, : IOS Press, 2007 |
| Descrizione fisica | 1 online resource (528 p.) |
| Disciplina | 004 |
| Altri autori (Persone) | McEwanAlistair A |
| Collana | Concurrent systems engineering series |
| Soggetto topico |
Parallel processing (Electronic computers)
occam (Computer program language) Transputers Computer architecture |
| ISBN |
6611029842
1-281-02984-X 9786611029845 1-60750-261-5 600-00-0368-4 1-4356-0867-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Title page; Preface; Programme Committee; Additional Reviewers; Contents; Fine-Grain Concurrency; Communicating Process Architecture for Multicores; Lazy Exploration and Checking of CSP Models with CSPsim; The Core Language of Aldwych; JCSProB: Implementing Integrated Formal Specifications in Concurrent Java; Components with Symbolic Transition Systems: A Java Implementation of Rendezvous; Concurrent/Reactive System Design with Honeysuckle; CSP and Real-Time: Reality or Illusion?; Testing and Sampling Parallel Systems; Mobility in JCSP: New Mobile Channel and Mobile Process Models
C++CSP2: A Many-to-Many Threading Model for Multicore ArchitecturesDesign Principles of the SystemCSP Software Framework; PyCSP - Communicating Sequential Processes for Python; A Process-Oriented Architecture for Complex System Modelling; Concurrency Control and Recovery Management for Open e-Business Transactions; trancell - An Experimental ETC to Cell BE Translator; A Versatile Hardware-Software Platform for In-Situ Monitoring Systems; High Cohesion and Low Coupling: The Office Mapping Factor; A Process Oriented Approach to USB Driver Development A Native Transterpreter for the LEGO Mindstorms RCXIntegrating and Extending JCSP; Hardware/Software Synthesis and Verification Using Esterel; Modeling and Analysis of the AMBA Bus Using CSP and B; A Step Towards Refining and Translating B Control Annotations to Handel-C; Towards the Formal Verification of a Java Processor in Event-B; Advanced System Simulation, Emulation and Test (ASSET); Development of a Family of Multi-Core Devices Using Hierarchical Abstraction; Domain Specific Transformations for Hardware Ray Tracing A Reconfigurable System-on-Chip Architecture for Pico-Satellite MissionsTransactional CSP Processes; Algebras of Actions in Concurrent Processes; Using occam-pi Primitives with the Cell Broadband Engine; Shared-Memory Multi-Processor Scheduling Algorithms for CCSP; Compiling occam to C with Tock; Author Index |
| Record Nr. | UNINA-9910813210703321 |
| Amsterdam ; Fairfax, VA, : IOS Press, 2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||