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Approximate computing / / Weiqiang Liu and Fabrizio Lombardi, editors
| Approximate computing / / Weiqiang Liu and Fabrizio Lombardi, editors |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer Nature Switzerland AG, , [2022] |
| Descrizione fisica | 1 online resource (607 pages) |
| Disciplina | 004 |
| Soggetto topico | Computers |
| ISBN | 3-030-98347-1 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996485667403316 |
| Cham, Switzerland : , : Springer Nature Switzerland AG, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Approximate computing / / Weiqiang Liu and Fabrizio Lombardi, editors
| Approximate computing / / Weiqiang Liu and Fabrizio Lombardi, editors |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer Nature Switzerland AG, , [2022] |
| Descrizione fisica | 1 online resource (607 pages) |
| Disciplina | 004 |
| Soggetto topico | Computers |
| ISBN | 3-030-98347-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910590077803321 |
| Cham, Switzerland : , : Springer Nature Switzerland AG, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Design and Applications of Emerging Computer Systems / / Weiqiang Liu, Jie Han, and Fabrizio Lombardi, editors
| Design and Applications of Emerging Computer Systems / / Weiqiang Liu, Jie Han, and Fabrizio Lombardi, editors |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer, , [2024] |
| Descrizione fisica | 1 online resource (745 pages) |
| Disciplina | 658.05 |
| Soggetto topico | Computer systems - Design and construction |
| ISBN | 3-031-42478-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Part-I. In-Memory Computing, Neuromorphic Computing and Machine Learning -- Chapter 1. Emerging Technologies for Memory-Centric Computing -- Chapter 2. An overview of Computation-in-Memory (CIM) architectures -- Chapter 3. Towards Spintronics Non-Volatile Computing-in-Memory Architecture -- Chapter 4. Is Neuromorphic Computing the Key to Power-Efficient Neural Networks?: A Survey -- Chapter 5. Emerging Machine Learning using Siamese and Triplet Neural Networks -- Chapter 6. An active storage system for intelligent data analysis and management -- Chapter 7. Error-Tolerant Techniques for Classifiers beyond Neural Networks for Dependable Machine Learning -- Part-II. Stochastic Computing -- Chapter 8. Efficient Random Number Source Designs Based on D Flip-Flops for Stochastic Computing -- Chapter 9. Stochastic multipliers from serial to parallel -- Chapter 10. Ising Models Based On Stochastic Computing -- Chapter 11. Stochastic and Approximate Computing for Deep Learning: A Survey -- Chapter 12. Stochastic Computing and Morphological Neural Networks: an ultra-high energy-efficient Machine Learning methodology -- Chapter 13. Characterizing Stochastic Number Generators for Accurate Stochastic Computing -- Part-III. Inexact/Approximate Computing -- Chapter 14. Automated Generation and Evaluation of Application-Oriented Approximate Arithmetic Circuits -- Chapter 15. Automatic Approximation of Computer Systems through Multi-Objective Optimization -- Chapter 16. Evaluation of the functional impact of approximate arithmetic circuits on two application examples -- Chapter 17. Energy Efficient Approximate Floating-Point FFT Design Using A Top-Down Methodology -- Chapter 18. Approximate Computing in Machine Learning Systems: Cross-level designs and methodologies -- Chapter 19. Adaptive Approximate Accelerators with Controlled Quality using Machine Learning -- Chapter 20. Design Wireless Communication Circuits and Systems Using Approximate Computing -- Chapter 21. Low-cost Logarithmic Floating-point Multipliers for Efficient Neural Network Training -- Part-IV. Quantum Computing and Other Emerging Computing -- Chapter 22. Cryogenic CMOS for quantum computing -- Chapter 23. Memristive Crossbar System towards Hardware Accelaration of Quantum Algorithms -- Chapter 24. A Review of Posit Arithmetic for Energy Efficient Computation: Methodologies, Applications, and Challenges -- Chapter 25. Designing Fault Tolerant Digital circuits in Quantum-dot Cellular Automata -- Chapter 26. CMOS Circuit-based Fully Connected Ising Machines with Parallel Updating and Its Applications in MIMO Detection -- Chapter 27. Approximate Communication in Network-on Chips for Training and Inference of Image Classification Models. |
| Record Nr. | UNINA-9910800111603321 |
| Cham, Switzerland : , : Springer, , [2024] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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GLSVLSI '10 : proceedings of the Great Lakes Symposium on VLSI 2010 : May 16-18, 2010, Providence, RI, USA
| GLSVLSI '10 : proceedings of the Great Lakes Symposium on VLSI 2010 : May 16-18, 2010, Providence, RI, USA |
| Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2010 |
| Descrizione fisica | 1 online resource (476 pages) |
| Collana | ACM Conferences |
| Soggetto topico |
Electrical & Computer Engineering
Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | Proceedings of the 20th symposium on Great lakes symposium on VLSI |
| Record Nr. | UNINA-9910376248503321 |
| [Place of publication not identified], : ACM, 2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97)
| Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97) |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1997 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.]. |
| Record Nr. | UNISA-996204515603316 |
| [Place of publication not identified], : IEEE Computer Society Press, 1997 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97)
| Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97) |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1997 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.]. |
| Record Nr. | UNINA-9910872636003321 |
| [Place of publication not identified], : IEEE Computer Society Press, 1997 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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