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GaN transistors for efficient power conversion / / Alex Lidow [and three others]
GaN transistors for efficient power conversion / / Alex Lidow [and three others]
Autore Lidow Alex
Edizione [Second edition.]
Pubbl/distr/stampa Chichester, England : , : Wiley, , 2015
Descrizione fisica 1 online resource (269 pages)
Disciplina 621.3815/284
Collana THEi Wiley ebooks.
Soggetto topico Field-effect transistors
Gallium nitride
ISBN 1-118-84479-3
1-118-84478-5
1-118-84477-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto GaN Transistors for Efficient Power Conversion; Contents; Foreword; Acknowledgments; 1 GaN Technology Overview; 1.1 Silicon Power MOSFETs 1976-2010; 1.2 The GaN Journey Begins; 1.3 Why Gallium Nitride?; 1.3.1 Band Gap (Eg); 1.3.2 Critical Field (Ecrit); 1.3.3 On-Resistance (RDS(on)); 1.3.4 The Two-Dimensional Electron Gas; 1.4 The Basic GaN Transistor Structure; 1.4.1 Recessed Gate Enhancement-Mode Structure; 1.4.2 Implanted Gate Enhancement-Mode Structure; 1.4.3 pGaN Gate Enhancement-Mode Structure; 1.4.4 Cascode Hybrid Enhancement-Mode Structure; 1.4.5 Reverse Conduction in HEMT Transistors
1.5 Building a GaN Transistor 1.5.1 Substrate Material Selection; 1.5.2 Growing the Heteroepitaxy; 1.5.3 Processing the Wafer; 1.5.4 Making Electrical Connection to the Outside World; 1.6 Summary; References; 2 GaN Transistor Electrical Characteristics; 2.1 Introduction; 2.2 Key Device Parameters; 2.2.1 Breakdown Voltage (BVDSS) and Leakage Current (IDSS); 2.2.2 On-Resistance (RDS(on)); 2.2.3 Threshold Voltage (VGS(th) or Vth); 2.3 Capacitance and Charge; 2.4 Reverse Conduction; 2.5 Thermal Resistance; 2.6 Transient Thermal Impedance; 2.7 Summary; References; 3 Driving GaN Transistors
3.1 Introduction 3.2 Gate Drive Voltage; 3.3 Bootstrapping and Floating Supplies; 3.4 dv/dt Immunity; 3.5 di/dt Immunity; 3.6 Ground Bounce; 3.7 Common Mode Current; 3.8 Gate Driver Edge Rate; 3.9 Driving Cascode GaN Devices; 3.10 Summary; References; 4 Layout Considerations for GaN Transistor Circuits; 4.1 Introduction; 4.2 Minimizing Parasitic Inductance; 4.3 Conventional Power Loop Designs; 4.4 Optimizing the Power Loop; 4.5 Paralleling GaN Transistors; 4.5.1 Paralleling GaN Transistors for a Single Switch; 4.5.2 Paralleling GaN Transistors for Half-Bridge Applications; 4.6 Summary
References 5 Modeling and Measurement of GaN Transistors; 5.1 Introduction; 5.2 Electrical Modeling; 5.2.1 Basic Modeling; 5.2.2 Limitations of Basic Modeling; 5.2.3 Limitations of Circuit Modeling; 5.3 Thermal Modeling; 5.3.1 Improving Thermal Performance; 5.3.2 Modeling of Multiple Die; 5.3.3 Modeling of Complex Systems; 5.4 Measuring GaN Transistor Performance; 5.4.1 Voltage Measurement Requirements; 5.4.2 Current Measurement Requirement; 5.5 Summary; References; 6 Hard-Switching Topologies; 6.1 Introduction; 6.2 Hard-Switching Loss Analysis; 6.2.1 Switching Losses
6.2.2 Output Capacitance (COSS) Losses 6.2.3 Gate Charge (QG) Losses; 6.2.4 Reverse Conduction Losses (PSD); 6.2.5 Reverse Recovery (QRR) Losses; 6.2.6 Total Hard-Switching Losses; 6.2.7 Hard-Switching Figure of Merit; 6.3 External Factors Impacting Hard-Switching Losses; 6.3.1 Impact of Common-Source Inductance; 6.3.2 Impact of High Frequency Power-Loop Inductance on Device Losses; 6.4 Reducing Body Diode Conduction Losses in GaN Transistors; 6.5 Frequency Impact on Magnetics; 6.5.1 Transformers; 6.5.2 Inductors; 6.6 Buck Converter Example; 6.6.1 Output Capacitance Losses
6.6.2 Gate Losses (PG)
Record Nr. UNINA-9910792134303321
Lidow Alex  
Chichester, England : , : Wiley, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
GaN transistors for efficient power conversion / / Alex Lidow [and three others]
GaN transistors for efficient power conversion / / Alex Lidow [and three others]
Autore Lidow Alex
Edizione [Second edition.]
Pubbl/distr/stampa Chichester, England : , : Wiley, , 2015
Descrizione fisica 1 online resource (269 pages)
Disciplina 621.3815/284
Collana THEi Wiley ebooks.
Soggetto topico Field-effect transistors
Gallium nitride
ISBN 1-118-84479-3
1-118-84478-5
1-118-84477-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto GaN Transistors for Efficient Power Conversion; Contents; Foreword; Acknowledgments; 1 GaN Technology Overview; 1.1 Silicon Power MOSFETs 1976-2010; 1.2 The GaN Journey Begins; 1.3 Why Gallium Nitride?; 1.3.1 Band Gap (Eg); 1.3.2 Critical Field (Ecrit); 1.3.3 On-Resistance (RDS(on)); 1.3.4 The Two-Dimensional Electron Gas; 1.4 The Basic GaN Transistor Structure; 1.4.1 Recessed Gate Enhancement-Mode Structure; 1.4.2 Implanted Gate Enhancement-Mode Structure; 1.4.3 pGaN Gate Enhancement-Mode Structure; 1.4.4 Cascode Hybrid Enhancement-Mode Structure; 1.4.5 Reverse Conduction in HEMT Transistors
1.5 Building a GaN Transistor 1.5.1 Substrate Material Selection; 1.5.2 Growing the Heteroepitaxy; 1.5.3 Processing the Wafer; 1.5.4 Making Electrical Connection to the Outside World; 1.6 Summary; References; 2 GaN Transistor Electrical Characteristics; 2.1 Introduction; 2.2 Key Device Parameters; 2.2.1 Breakdown Voltage (BVDSS) and Leakage Current (IDSS); 2.2.2 On-Resistance (RDS(on)); 2.2.3 Threshold Voltage (VGS(th) or Vth); 2.3 Capacitance and Charge; 2.4 Reverse Conduction; 2.5 Thermal Resistance; 2.6 Transient Thermal Impedance; 2.7 Summary; References; 3 Driving GaN Transistors
3.1 Introduction 3.2 Gate Drive Voltage; 3.3 Bootstrapping and Floating Supplies; 3.4 dv/dt Immunity; 3.5 di/dt Immunity; 3.6 Ground Bounce; 3.7 Common Mode Current; 3.8 Gate Driver Edge Rate; 3.9 Driving Cascode GaN Devices; 3.10 Summary; References; 4 Layout Considerations for GaN Transistor Circuits; 4.1 Introduction; 4.2 Minimizing Parasitic Inductance; 4.3 Conventional Power Loop Designs; 4.4 Optimizing the Power Loop; 4.5 Paralleling GaN Transistors; 4.5.1 Paralleling GaN Transistors for a Single Switch; 4.5.2 Paralleling GaN Transistors for Half-Bridge Applications; 4.6 Summary
References 5 Modeling and Measurement of GaN Transistors; 5.1 Introduction; 5.2 Electrical Modeling; 5.2.1 Basic Modeling; 5.2.2 Limitations of Basic Modeling; 5.2.3 Limitations of Circuit Modeling; 5.3 Thermal Modeling; 5.3.1 Improving Thermal Performance; 5.3.2 Modeling of Multiple Die; 5.3.3 Modeling of Complex Systems; 5.4 Measuring GaN Transistor Performance; 5.4.1 Voltage Measurement Requirements; 5.4.2 Current Measurement Requirement; 5.5 Summary; References; 6 Hard-Switching Topologies; 6.1 Introduction; 6.2 Hard-Switching Loss Analysis; 6.2.1 Switching Losses
6.2.2 Output Capacitance (COSS) Losses 6.2.3 Gate Charge (QG) Losses; 6.2.4 Reverse Conduction Losses (PSD); 6.2.5 Reverse Recovery (QRR) Losses; 6.2.6 Total Hard-Switching Losses; 6.2.7 Hard-Switching Figure of Merit; 6.3 External Factors Impacting Hard-Switching Losses; 6.3.1 Impact of Common-Source Inductance; 6.3.2 Impact of High Frequency Power-Loop Inductance on Device Losses; 6.4 Reducing Body Diode Conduction Losses in GaN Transistors; 6.5 Frequency Impact on Magnetics; 6.5.1 Transformers; 6.5.2 Inductors; 6.6 Buck Converter Example; 6.6.1 Output Capacitance Losses
6.6.2 Gate Losses (PG)
Record Nr. UNINA-9910808289103321
Lidow Alex  
Chichester, England : , : Wiley, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui