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Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay
| Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay |
| Autore | Kundu Santanu |
| Pubbl/distr/stampa | Boca Raton, FL : , : CRC Press : , : Taylor & Francis Group, , 2015 |
| Descrizione fisica | 1 online resource (380 p.) |
| Disciplina | 621.3815/31 |
| Soggetto topico | Networks on a chip |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-351-83196-8
1-315-21607-8 1-138-74935-4 1-4665-6527-6 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Contents; Preface; Authors; Chapter 1: Introduction; Chapter 2: Interconnection Networks in Network-on-Chip; Chapter 3: Architecture Design of Network-on-Chip; Chapter 4: Evaluation of Network-on-Chip Architectures; Chapter 5: Application Mapping on Network-on-Chip; Chapter 6: Low-Power Techniques for Network-on-Chip; Chapter 7: Signal Integrity and Reliability of Network-on-Chip; Chapter 8: Testing of Network-on-Chip Architectures; Chapter 9: Application-Specific Network- on-Chip Synthesis; Chapter 10: Reconfigurable Network-on-Chip Design
Chapter 11: Three-Dimensional Integration of Network-on-ChipChapter 12: Conclusions and Future Trends; Back Cover |
| Record Nr. | UNINA-9910410651603321 |
Kundu Santanu
|
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| Boca Raton, FL : , : CRC Press : , : Taylor & Francis Group, , 2015 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay
| Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay |
| Autore | Kundu Santanu |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Boca Raton, Florida : , : CRC Press, , [2015] |
| Descrizione fisica | 1 online resource (380 p.) |
| Disciplina | 621.381531 |
| Soggetto topico | Networks on a chip |
| ISBN |
1-351-83196-8
1-315-21607-8 1-138-74935-4 1-4665-6527-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Contents; Preface; Authors; Chapter 1: Introduction; Chapter 2: Interconnection Networks in Network-on-Chip; Chapter 3: Architecture Design of Network-on-Chip; Chapter 4: Evaluation of Network-on-Chip Architectures; Chapter 5: Application Mapping on Network-on-Chip; Chapter 6: Low-Power Techniques for Network-on-Chip; Chapter 7: Signal Integrity and Reliability of Network-on-Chip; Chapter 8: Testing of Network-on-Chip Architectures; Chapter 9: Application-Specific Network- on-Chip Synthesis; Chapter 10: Reconfigurable Network-on-Chip Design
Chapter 11: Three-Dimensional Integration of Network-on-ChipChapter 12: Conclusions and Future Trends; Back Cover |
| Record Nr. | UNINA-9910765997503321 |
|
Kundu Santanu
|
||
| Boca Raton, Florida : , : CRC Press, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay
| Network-on-chip : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay |
| Autore | Kundu Santanu |
| Pubbl/distr/stampa | Boca Raton, FL : , : Taylor & Francis, , 2014 |
| Descrizione fisica | 1 online resource (xvii, 369 pages) : illustrations |
| Disciplina | 621.381531 |
| Soggetto topico | Networks on a chip |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | 1. Introduction -- 2. Interconnection networks in network-on-chip -- 3. Architecture design of network-on-chip -- 4. Evaluation of network-on-chip architectures -- 5. Application mapping on network-on-chip -- 6. Low-power techniques for network-on-chip -- 7. Signal integrity and reliability of network-on-chip -- 8. Testing of network-on-chip architectures -- 9. Application-specific network-on-chip synthesis -- 10. Reconfigurable network-on-chip design -- 11. Three-dimensional integration of network-on-chip -- 12. Conclusions and future trends. |
| Altri titoli varianti | Network-on-Chip |
| Record Nr. | UNINA-9910477124103321 |
|
Kundu Santanu
|
||
| Boca Raton, FL : , : Taylor & Francis, , 2014 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||