Formal Hardware Verification [[electronic resource] ] : Methods and Systems in Comparison / / edited by Thomas Kropf |
Edizione | [1st ed. 1997.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997 |
Descrizione fisica | 1 online resource (XII, 376 p.) |
Disciplina | 621.39/5 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Computer engineering
Computer hardware Computer logic Mathematical logic Computer Engineering Computer Hardware Logics and Meanings of Programs Mathematical Logic and Formal Languages |
ISBN | 3-540-69577-X |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Symbolic trajectory evaluation -- Automated verification with abstract state machines using multiway decision graphs -- Design verification using Synchronized Transitions -- Hardware verification using PVS -- Verifying VHDL designs with COSPAN -- The C@S system: Combining proof strategies for system verification -- Appendix: The common book examples. |
Record Nr. | UNINA-9910144915703321 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997 | ||
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Lo trovi qui: Univ. Federico II | ||
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Formal Hardware Verification [[electronic resource] ] : Methods and Systems in Comparison / / edited by Thomas Kropf |
Edizione | [1st ed. 1997.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997 |
Descrizione fisica | 1 online resource (XII, 376 p.) |
Disciplina | 621.39/5 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Computer engineering
Computer hardware Computer logic Mathematical logic Computer Engineering Computer Hardware Logics and Meanings of Programs Mathematical Logic and Formal Languages |
ISBN | 3-540-69577-X |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Symbolic trajectory evaluation -- Automated verification with abstract state machines using multiway decision graphs -- Design verification using Synchronized Transitions -- Hardware verification using PVS -- Verifying VHDL designs with COSPAN -- The C@S system: Combining proof strategies for system verification -- Appendix: The common book examples. |
Record Nr. | UNISA-996465485203316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997 | ||
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Lo trovi qui: Univ. di Salerno | ||
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Theorem Provers in Circuit Design: Theory, Practice and Experience [[electronic resource] ] : Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26-28, 1994. Proceedings / / edited by Ramayya Kumar, Thomas Kropf |
Edizione | [1st ed. 1995.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 |
Descrizione fisica | 1 online resource (VIII, 312 p.) |
Disciplina | 621.39/2 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Computers
Electronic circuits Mathematical logic Artificial intelligence Microprogramming Electronics Microelectronics Theory of Computation Circuits and Systems Mathematical Logic and Formal Languages Artificial Intelligence Control Structures and Microprogramming Electronics and Microelectronics, Instrumentation |
ISBN | 3-540-49177-5 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Benchmark-circuits for hardware-verification -- Reasoning about pipelines with structural hazards -- A correctness model for pipelined microprocessors -- Non-restoring integer square root: A case study in design by principled optimization -- An automatic generalization method for the inductive proof of replicated and parallel architectures -- A compositional circuit model and verification by composition -- Exploiting structural similarities in a BDD-based verification method -- Studies of the single pulser in various reasoning systems -- Mechanized verification of speed-independence -- Automatic correctness proof of the implementation of synchronous sequential circuits using an algebraic approach -- Mechanized verification of refinement -- Effective theorem proving for hardware verification -- A formal framework for high level synthesis -- Tutorial on design verification with synchronized transitions -- A tutorial on using PVS for hardware verification -- A reduced instruction set proof environment -- Quantitative evaluation of formal based synthesis in ASIC design -- Formal verification of characteristic properties -- Extending formal reasoning with support for hardware diagrams. |
Record Nr. | UNISA-996466099703316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 | ||
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Lo trovi qui: Univ. di Salerno | ||
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