Formal techniques for networked and distributed systems [[electronic resource] ] : FORTE 2001 : IFIP TC6 WG6.1 - 21st International Conference on Formal Techniques for Networked and Distributed Systems, August 28-31, 2001, Cheju Island, Korea / / edited by Myungchul Kim ... [et al.] |
Edizione | [1st ed. 2001.] |
Pubbl/distr/stampa | New York, : Kluwer Academic, c2001 |
Descrizione fisica | 1 online resource (472 pages) |
Disciplina | 004.36 |
Altri autori (Persone) | KimMyungchul |
Collana | IFIP Advances in Information and Communication Technology |
Soggetto topico |
Electronic data processing - Distributed processing
Formal methods (Computer science) |
Soggetto genere / forma | Electronic books. |
ISBN |
1-280-20575-X
9786610205752 0-306-47003-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Formal Methods in Software Development I -- Automated Derivation of ILP Implementations from SDL Specifications -- Stepwise Design with Message Sequence Charts -- Formal Synthesis and Control of Soft Embedded Real-Time Systems -- Distributed Systems Testing -- Towards a Formal Framework for Interoperability Testing -- Distributed Test Using Logical Clock -- Diagnosing Multiple Faults in Communicating Finite State Machines -- From Active to Passive: Progress in Testing of Internet Routing Protocols -- Timed Automata -- Time and Action Lock Freedom Properties for Timed Automata -- Compiling Real-time Scenarios into a Timed Automaton -- Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-time Temporal Logic Formulas -- Process Algebra -- PAMR: A Process Algebra for the Management of Resources in Concurrent Systems -- A Symbolic Semantics and Bisimulation for Full Lotos -- Implementing a Modal Logic Over Data and Processes Using XTL -- Applications of Verification -- Formal Verification of Peephole Optimizations in Asynchronous Circuits -- Symbolic Verification of Complex Real-time Systems with Clock-restriction Diagram -- Verifying a Sliding-Window Protocol Using PVS -- Test Sequence Derivation -- Test Sequence Selection -- Executable Test Sequence for the Protocol Data Flow Property -- A Method to Generate Conformance Test Sequences for FSM with Timer System Call -- Formal Methods in Software Development II -- A Tool for Generating Specifications from A Family of Formal Requirements -- Patterns and Rules for Behavioural Subtyping -- Theories of Verification -- Verification of Dense Time Properties Using Theories of Untimed Process Algebra -- Testing Liveness Properties -- SVL: A Scripting Language for Compositional Verification -- Invited Papers -- On Formal Techniques in Protocol Engineering — Example Challenges -- A PKI-based End-To-End Secure Infrastructure for Mobile E-Commerce -- A Family of Resource-Bound Real-Time Process Algebras -- Survivability Analysis of Networked Systems. |
Record Nr. | UNINA-9910454849203321 |
New York, : Kluwer Academic, c2001 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Formal techniques for networked and distributed systems [[electronic resource] ] : FORTE 2001 : IFIP TC6 WG6.1 - 21st International Conference on Formal Techniques for Networked and Distributed Systems, August 28-31, 2001, Cheju Island, Korea / / edited by Myungchul Kim ... [et al.] |
Edizione | [1st ed. 2001.] |
Pubbl/distr/stampa | New York, : Kluwer Academic, c2001 |
Descrizione fisica | 1 online resource (472 pages) |
Disciplina | 004.36 |
Altri autori (Persone) | KimMyungchul |
Collana | IFIP Advances in Information and Communication Technology |
Soggetto topico |
Electronic data processing - Distributed processing
Formal methods (Computer science) |
ISBN |
1-280-20575-X
9786610205752 0-306-47003-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Formal Methods in Software Development I -- Automated Derivation of ILP Implementations from SDL Specifications -- Stepwise Design with Message Sequence Charts -- Formal Synthesis and Control of Soft Embedded Real-Time Systems -- Distributed Systems Testing -- Towards a Formal Framework for Interoperability Testing -- Distributed Test Using Logical Clock -- Diagnosing Multiple Faults in Communicating Finite State Machines -- From Active to Passive: Progress in Testing of Internet Routing Protocols -- Timed Automata -- Time and Action Lock Freedom Properties for Timed Automata -- Compiling Real-time Scenarios into a Timed Automaton -- Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-time Temporal Logic Formulas -- Process Algebra -- PAMR: A Process Algebra for the Management of Resources in Concurrent Systems -- A Symbolic Semantics and Bisimulation for Full Lotos -- Implementing a Modal Logic Over Data and Processes Using XTL -- Applications of Verification -- Formal Verification of Peephole Optimizations in Asynchronous Circuits -- Symbolic Verification of Complex Real-time Systems with Clock-restriction Diagram -- Verifying a Sliding-Window Protocol Using PVS -- Test Sequence Derivation -- Test Sequence Selection -- Executable Test Sequence for the Protocol Data Flow Property -- A Method to Generate Conformance Test Sequences for FSM with Timer System Call -- Formal Methods in Software Development II -- A Tool for Generating Specifications from A Family of Formal Requirements -- Patterns and Rules for Behavioural Subtyping -- Theories of Verification -- Verification of Dense Time Properties Using Theories of Untimed Process Algebra -- Testing Liveness Properties -- SVL: A Scripting Language for Compositional Verification -- Invited Papers -- On Formal Techniques in Protocol Engineering — Example Challenges -- A PKI-based End-To-End Secure Infrastructure for Mobile E-Commerce -- A Family of Resource-Bound Real-Time Process Algebras -- Survivability Analysis of Networked Systems. |
Record Nr. | UNINA-9910780042603321 |
New York, : Kluwer Academic, c2001 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Formal techniques for networked and distributed systems : FORTE 2001 : IFIP TC6 WG6.1 - 21st International Conference on Formal Techniques for Networked and Distributed Systems, August 28-31, 2001, Cheju Island, Korea / / edited by Myungchul Kim ... [et al.] |
Edizione | [1st ed. 2001.] |
Pubbl/distr/stampa | New York, : Kluwer Academic, c2001 |
Descrizione fisica | 1 online resource (472 pages) |
Disciplina | 004.36 |
Altri autori (Persone) | KimMyungchul |
Collana | IFIP Advances in Information and Communication Technology |
Soggetto topico |
Electronic data processing - Distributed processing
Formal methods (Computer science) |
ISBN |
1-280-20575-X
9786610205752 0-306-47003-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Formal Methods in Software Development I -- Automated Derivation of ILP Implementations from SDL Specifications -- Stepwise Design with Message Sequence Charts -- Formal Synthesis and Control of Soft Embedded Real-Time Systems -- Distributed Systems Testing -- Towards a Formal Framework for Interoperability Testing -- Distributed Test Using Logical Clock -- Diagnosing Multiple Faults in Communicating Finite State Machines -- From Active to Passive: Progress in Testing of Internet Routing Protocols -- Timed Automata -- Time and Action Lock Freedom Properties for Timed Automata -- Compiling Real-time Scenarios into a Timed Automaton -- Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-time Temporal Logic Formulas -- Process Algebra -- PAMR: A Process Algebra for the Management of Resources in Concurrent Systems -- A Symbolic Semantics and Bisimulation for Full Lotos -- Implementing a Modal Logic Over Data and Processes Using XTL -- Applications of Verification -- Formal Verification of Peephole Optimizations in Asynchronous Circuits -- Symbolic Verification of Complex Real-time Systems with Clock-restriction Diagram -- Verifying a Sliding-Window Protocol Using PVS -- Test Sequence Derivation -- Test Sequence Selection -- Executable Test Sequence for the Protocol Data Flow Property -- A Method to Generate Conformance Test Sequences for FSM with Timer System Call -- Formal Methods in Software Development II -- A Tool for Generating Specifications from A Family of Formal Requirements -- Patterns and Rules for Behavioural Subtyping -- Theories of Verification -- Verification of Dense Time Properties Using Theories of Untimed Process Algebra -- Testing Liveness Properties -- SVL: A Scripting Language for Compositional Verification -- Invited Papers -- On Formal Techniques in Protocol Engineering — Example Challenges -- A PKI-based End-To-End Secure Infrastructure for Mobile E-Commerce -- A Family of Resource-Bound Real-Time Process Algebras -- Survivability Analysis of Networked Systems. |
Record Nr. | UNINA-9910816862803321 |
New York, : Kluwer Academic, c2001 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|