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Finite state machine logic synthesis for complex programmable logic devices / / Robert Czerwinski and Dariusz Kania
| Finite state machine logic synthesis for complex programmable logic devices / / Robert Czerwinski and Dariusz Kania |
| Autore | Czerwinski Robert |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Heidelberg [Germany] : , : Springer, , 2013 |
| Descrizione fisica | 1 online resource (xiv, 172 pages) : illustrations |
| Disciplina |
621.39/5
621.395 |
| Collana | Lecture Notes in Electrical Engineering |
| Soggetto topico |
Programmable logic devices
Sequential machine theory |
| ISBN | 3-642-36166-8 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Definitions and Basic Properties -- Synthesis of FSMs -- State Assignment Algorithms -- Theoretical Background of Technology-Dependent Optimization -- The Algorithm of Area Optimization Based on Graphs of Outputs -- Conclusions -- Output File Format -- Conclusion. |
| Record Nr. | UNINA-9910437913103321 |
Czerwinski Robert
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| Heidelberg [Germany] : , : Springer, , 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Technology mapping for LUT-based FPGA / / Marcin Kubica, Adam Opara, Dariusz Kania
| Technology mapping for LUT-based FPGA / / Marcin Kubica, Adam Opara, Dariusz Kania |
| Autore | Kubica Marcin |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer, , [2021] |
| Descrizione fisica | 1 online resource (IX, 207 p. 111 illus., 53 illus. in color.) |
| Disciplina | 621.395 |
| Collana | Lecture notes in electrical engineering |
| Soggetto topico | Field programmable gate arrays |
| ISBN | 3-030-60488-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks. |
| Record Nr. | UNINA-9910484985203321 |
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Kubica Marcin
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| Cham, Switzerland : , : Springer, , [2021] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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