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Advanced circuits for emerging technologies [[electronic resource] /] / edited by Krzysztof Iniewski
Advanced circuits for emerging technologies [[electronic resource] /] / edited by Krzysztof Iniewski
Pubbl/distr/stampa Hoboken, N.J., : John Wiley & Sons, 2012
Descrizione fisica 1 online resource (633 p.)
Disciplina 621.395
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Electric circuits
Technological innovations
ISBN 1-280-59203-6
9786613621863
1-118-18150-6
1-118-18149-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto pt. 1. Digital design and power management -- pt. 2. Analog and RF design -- pt. 3. Device layout and reliability -- pt. 4. Circuit testing.
Record Nr. UNINA-9910141297603321
Hoboken, N.J., : John Wiley & Sons, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Advanced circuits for emerging technologies / / edited by Krzysztof Iniewski
Advanced circuits for emerging technologies / / edited by Krzysztof Iniewski
Edizione [1st ed.]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley & Sons, 2012
Descrizione fisica 1 online resource (633 p.)
Disciplina 621.395
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Electric circuits
Technological innovations
ISBN 1-280-59203-6
9786613621863
1-118-18150-6
1-118-18149-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto pt. 1. Digital design and power management -- pt. 2. Analog and RF design -- pt. 3. Device layout and reliability -- pt. 4. Circuit testing.
Record Nr. UNINA-9910822111103321
Hoboken, N.J., : John Wiley & Sons, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Advances in imaging and sensing / / edited by Shuo Tang, University of British Columbia Vancouver, British Columbia, Canada, and Daryoosh Saeedkia, TeTechS Incorporated Waterloo, Ontario, Canada ; managing editor, Krzysztof Iniewski, Emerging Technologie
Advances in imaging and sensing / / edited by Shuo Tang, University of British Columbia Vancouver, British Columbia, Canada, and Daryoosh Saeedkia, TeTechS Incorporated Waterloo, Ontario, Canada ; managing editor, Krzysztof Iniewski, Emerging Technologie
Pubbl/distr/stampa Boca Raton : , : CRC Press, , [2017]
Descrizione fisica 1 online resource (304 pages) : illustrations, tables
Disciplina 621.367
Collana Devices, Circuits, and Systems
Soggetto topico Imaging systems
Submillimeter waves
Teraherz technology
ISBN 1-315-37128-6
1-315-35410-1
1-4987-1476-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Section I. Technology and devices -- Section II. Imaging sensors and systems -- Section III. Biomedical applications.
Record Nr. UNINA-9910148742503321
Boca Raton : , : CRC Press, , [2017]
Materiale a stampa
Lo trovi qui: Univ. Federico II
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CMOS biomicrosystems : where electronics meets biology / / edited by Krzysztof Iniewski
CMOS biomicrosystems : where electronics meets biology / / edited by Krzysztof Iniewski
Autore Iniewski Krzysztof <1960->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, New Jersey : , : Wiley, , c2011
Descrizione fisica 1 online resource (516 p.)
Disciplina 610.28
621.381
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Integrated circuits
Metal oxide semiconductors, Complementary
ISBN 1-283-08208-X
9786613082084
1-118-01648-3
1-118-01649-1
1-118-01647-5
Classificazione TEC008070
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Preface -- Contributors -- PART I: HUMAN BODY MONITORING -- 1 INTERFACING BIOLOGY AND CIRCUITS: QUANTIFICATION AND PERFORMANCE METRICS (Alexander J. Casson and Esther Rodriguez-Villegas) -- 2 FULLY INTEGRATED SYSTEMS FOR NEURAL SIGNAL RECORDING: TECHNOLOGY PERSPECTIVE AND LOW-NOISE FRONT-END DESIGN (Andrea Bonfanti, Tommaso Borghi, Guido Zambra, and Andrea L. Lacaita) -- 3 VLSI IMPLEMENTATION OF WIRELESS NEURAL RECORDING MICROSYSTEM FOR NEUROMUSCULAR STIMULATION (Shuenn-Yuh Lee, Chih-Jen Cheng, Shyh-Chyang Lee, and Qiang Fang) -- 4 HEALTH-CARE DEVICES USING RADIO FREQUENCY TECHNOLOGY (Jung Han Choi and Dong Kyun Kim) -- 5 DESIGN CONSIDERATIONS OF LOW-POWER DIGITAL INTEGRATED SYSTEMS FOR IMPLANTABLE MEDICAL APPLICATIONS (Zhihua Wang, Xiang Xie, Xinkai Chen, and Xiaowen Li) -- PART II: BIOSENSORS AND CIRCUITS -- 6 AFFINITY-BASED BIOSENSORS: STOCHASTIC MODELING AND FIGURES OF MERIT (Shreepriya Das, Haris Vikalo, and Arjang Hassibi) -- 7 FABRICATION EXAMPLES BASED ON STANDARD CMOS AND MEMS PROCESSES (Bernard Courtois) -- 8 CMOS CAPACITIVE BIOINTERFACES FOR LAB-ON-CHIP APPLICATIONS (Ebrahim Ghafar-Zadeh) -- 9 LENSFREE IMAGING CYTOMETRY AND DIAGNOSTICS FOR POINT-OF-CARE AND TELEMEDICINE APPLICATIONS (Sungkyu Seo, Ting-Wei Su, Anthony Erlinger, and Aydogan Ozcan) -- 10 ADVANCED TECHNOLOGIES FOR REAL-TIME MONITORING AND CONTROL IN BIOMICROFLUIDICS (Francesca Sapuppo, Marcos Intaglietta, and Maide Bucolo) -- 11 MONITORING OF STEM CELL CULTURE PROCESS USING ELECTROCHEMICAL BIOSENSORS (Xicai Yue and Emmanuel M. Drakakis) -- PART III: EMERGING TECHNOLOGIES -- 12 BUILDING INTERFACES TO DEVELOPING CELLS AND ORGANISMS: FROM CYBORG BEETLES TO SYNTHETIC BIOLOGY (Hirotaka Sato, Daniel Cohen, and Michel M. Maharbiz) -- 13 TECHNOLOGIES FOR ARRAYED SINGLE-CELL BIOLOGY (Sarah C. McQuaide, James R. Etzkorn, and Babak A. Parviz) -- 14 APPLICATION OF BACTERIAL FLAGELLAR MOTORS IN MICROFLUIDIC SYSTEMS (Steve Tung, Jin-Woo Kim, and Ryan Pooran) -- 15 GENE INJECTION AND MANIPULATION USING CMOS-BASED TECHNOLOGIES (Arati Sridharan and Jit Muthuswamy).
16 LOW-COST DIAGNOSTICS: RF DESIGNER'S APPROACH (Nan Sun, Yong Liu, and Donhee Ham) -- Index.
Altri titoli varianti CMOS Bio-Microsystems : Where Electronics Meets Biology
Record Nr. UNINA-9910139451603321
Iniewski Krzysztof <1960->  
Hoboken, New Jersey : , : Wiley, , c2011
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
CMOS biomicrosystems : where electronics meets biology / / edited by Krzysztof Iniewski
CMOS biomicrosystems : where electronics meets biology / / edited by Krzysztof Iniewski
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, NJ, : Wiley, 2010
Descrizione fisica 1 online resource (516 p.)
Disciplina 610.28
621.381
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Integrated circuits
Metal oxide semiconductors, Complementary
ISBN 1-283-08208-X
9786613082084
1-118-01648-3
1-118-01649-1
1-118-01647-5
Classificazione TEC008070
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Preface -- Contributors -- PART I: HUMAN BODY MONITORING -- 1 INTERFACING BIOLOGY AND CIRCUITS: QUANTIFICATION AND PERFORMANCE METRICS (Alexander J. Casson and Esther Rodriguez-Villegas) -- 2 FULLY INTEGRATED SYSTEMS FOR NEURAL SIGNAL RECORDING: TECHNOLOGY PERSPECTIVE AND LOW-NOISE FRONT-END DESIGN (Andrea Bonfanti, Tommaso Borghi, Guido Zambra, and Andrea L. Lacaita) -- 3 VLSI IMPLEMENTATION OF WIRELESS NEURAL RECORDING MICROSYSTEM FOR NEUROMUSCULAR STIMULATION (Shuenn-Yuh Lee, Chih-Jen Cheng, Shyh-Chyang Lee, and Qiang Fang) -- 4 HEALTH-CARE DEVICES USING RADIO FREQUENCY TECHNOLOGY (Jung Han Choi and Dong Kyun Kim) -- 5 DESIGN CONSIDERATIONS OF LOW-POWER DIGITAL INTEGRATED SYSTEMS FOR IMPLANTABLE MEDICAL APPLICATIONS (Zhihua Wang, Xiang Xie, Xinkai Chen, and Xiaowen Li) -- PART II: BIOSENSORS AND CIRCUITS -- 6 AFFINITY-BASED BIOSENSORS: STOCHASTIC MODELING AND FIGURES OF MERIT (Shreepriya Das, Haris Vikalo, and Arjang Hassibi) -- 7 FABRICATION EXAMPLES BASED ON STANDARD CMOS AND MEMS PROCESSES (Bernard Courtois) -- 8 CMOS CAPACITIVE BIOINTERFACES FOR LAB-ON-CHIP APPLICATIONS (Ebrahim Ghafar-Zadeh) -- 9 LENSFREE IMAGING CYTOMETRY AND DIAGNOSTICS FOR POINT-OF-CARE AND TELEMEDICINE APPLICATIONS (Sungkyu Seo, Ting-Wei Su, Anthony Erlinger, and Aydogan Ozcan) -- 10 ADVANCED TECHNOLOGIES FOR REAL-TIME MONITORING AND CONTROL IN BIOMICROFLUIDICS (Francesca Sapuppo, Marcos Intaglietta, and Maide Bucolo) -- 11 MONITORING OF STEM CELL CULTURE PROCESS USING ELECTROCHEMICAL BIOSENSORS (Xicai Yue and Emmanuel M. Drakakis) -- PART III: EMERGING TECHNOLOGIES -- 12 BUILDING INTERFACES TO DEVELOPING CELLS AND ORGANISMS: FROM CYBORG BEETLES TO SYNTHETIC BIOLOGY (Hirotaka Sato, Daniel Cohen, and Michel M. Maharbiz) -- 13 TECHNOLOGIES FOR ARRAYED SINGLE-CELL BIOLOGY (Sarah C. McQuaide, James R. Etzkorn, and Babak A. Parviz) -- 14 APPLICATION OF BACTERIAL FLAGELLAR MOTORS IN MICROFLUIDIC SYSTEMS (Steve Tung, Jin-Woo Kim, and Ryan Pooran) -- 15 GENE INJECTION AND MANIPULATION USING CMOS-BASED TECHNOLOGIES (Arati Sridharan and Jit Muthuswamy).
16 LOW-COST DIAGNOSTICS: RF DESIGNER'S APPROACH (Nan Sun, Yong Liu, and Donhee Ham) -- Index.
Record Nr. UNINA-9910817208803321
Hoboken, NJ, : Wiley, 2010
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Embedded systems [[electronic resource] ] : hardware, design, and implementation / / edited by Krzysztof Iniewski
Embedded systems [[electronic resource] ] : hardware, design, and implementation / / edited by Krzysztof Iniewski
Pubbl/distr/stampa Hoboken, N.J., : John Wiley & Sons, Inc., 2013
Descrizione fisica 1 online resource (387 p.)
Disciplina 006.2/2
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Embedded computer systems
ISBN 1-118-46865-1
1-283-73564-4
1-118-46861-9
Classificazione TEC008070
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title page; Copyright page; Contents; Preface; Contributors; 1: Low Power Multicore Processors for Embedded Systems; 1.1 Multicore Chip with Highly Efficient Cores; 1.2 SuperHTM RISC Engine Family (SH) Processor Cores; 1.2.1 History of SH Processor Cores; 1.2.2 Highly Efficient ISA; 1.2.3 Asymmetric In-Order Dual-Issue Superscalar Architecture; 1.3 SH-X: A Highly Efficient CPU Core; 1.3.1 Microarchitecture Selections; 1.3.2 Improved Superpipeline Structure; 1.3.3 Branch Prediction and Out-of-Order Branch Issue; 1.3.4 Low Power Technologies; 1.3.5 Performance and Efficiency Evaluations
1.4 SH-X FPU: A Highly Efficient FPU1.4.1 FPU Architecture of SH Processors; 1.4.2 Implementation of SH-X FPU; 1.4.3 Performance Evaluations with 3D Graphics Benchmark; 1.5 SH-X2: Frequency and Efficiency Enhanced Core; 1.5.1 Frequency Enhancement; 1.5.2 Low Power Technologies; 1.6 SH-X3: Multicore Architecture Extension; 1.6.1 SH-X3 Core Specifications; 1.6.2 Symmetric and Asymmetric Multiprocessor Support; 1.6.3 Core Snoop Sequence Optimization; 1.6.4 Dynamic Power Management; 1.6.5 RP-1 Prototype Chip; 1.6.6 RP-2 Prototype Chip; 1.7 SH-X4: ISA and Address Space Extension
1.7.1 SH-X4 Core Specifications1.7.2 Efficient ISA Extension; 1.7.3 Address Space Extension; 1.7.4 Data Transfer Unit; 1.7.5 RP-X Prototype Chip; References; 2: Special-Purpose Hardware for Computational Biology; 2.1 Molecular Dynamics Simulations on Graphics Processing Units; 2.1.1 Molecular Mechanics Force Fields; 2.1.2 Graphics Processing Units for MD Simulations; 2.2 Special-Purpose Hardware and Network Topologies for MD Simulations; 2.2.1 High-Throughput Interaction Subsystem; 2.2.2 Hardware Description of the Flexible Subsystem; 2.2.3 Performance and Conclusions
2.3 Quantum MC Applications on Field-Programmable Gate Arrays2.3.1 Energy Computation and WF Kernels; 2.3.2 Hardware Architecture; 2.3.3 PE and WF Computation Kernels; 2.4 Conclusions and Future Directions; References; 3: Embedded GPU Design; 3.1 Introduction; 3.2 System Architecture; 3.3 Graphics Modules Design; 3.3.1 RISC Processor; 3.3.2 Geometry Processor; 3.3.3 Rendering Engine; 3.4 System Power Management; 3.4.1 Multiple Power-Domain Management; 3.4.2 Power Management Unit; 3.5 Implementation Results; 3.5.1 Chip Implementation; 3.5.2 Comparisons; 3.6 Conclusion; References
4: Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors4.1 Introduction; 4.2 The DVP Interface; 4.3 The iBRIDGE-BB Architecture; 4.3.1 Configuring the iBRIDGE-BB; 4.3.2 Operation of the iBRIDGE-BB; 4.3.3 Description of Internal Blocks; 4.4 Hardware Implementation; 4.4.1 Verification in Field-Programmable Gate Array; 4.4.2 Application in Image Compression; 4.4.3 Application-Specific Integrated Circuit (ASIC) Synthesis and Performance Analysis; 4.5 Conclusion; Acknowledgments; References; 5: Embedded Computing Systems on FPGAs; 5.1 FPGA Architecture
5.2 FPGA Configuration Technology
Record Nr. UNINA-9910141415403321
Hoboken, N.J., : John Wiley & Sons, Inc., 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Embedded systems : hardware, design, and implementation / / edited by Krzysztof Iniewski
Embedded systems : hardware, design, and implementation / / edited by Krzysztof Iniewski
Edizione [1st ed.]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley & Sons, Inc., 2013
Descrizione fisica 1 online resource (387 p.)
Disciplina 006.2/2
Altri autori (Persone) IniewskiKrzysztof
Soggetto topico Embedded computer systems
ISBN 1-118-46865-1
1-283-73564-4
1-118-46861-9
Classificazione TEC008070
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title page; Copyright page; Contents; Preface; Contributors; 1: Low Power Multicore Processors for Embedded Systems; 1.1 Multicore Chip with Highly Efficient Cores; 1.2 SuperHTM RISC Engine Family (SH) Processor Cores; 1.2.1 History of SH Processor Cores; 1.2.2 Highly Efficient ISA; 1.2.3 Asymmetric In-Order Dual-Issue Superscalar Architecture; 1.3 SH-X: A Highly Efficient CPU Core; 1.3.1 Microarchitecture Selections; 1.3.2 Improved Superpipeline Structure; 1.3.3 Branch Prediction and Out-of-Order Branch Issue; 1.3.4 Low Power Technologies; 1.3.5 Performance and Efficiency Evaluations
1.4 SH-X FPU: A Highly Efficient FPU1.4.1 FPU Architecture of SH Processors; 1.4.2 Implementation of SH-X FPU; 1.4.3 Performance Evaluations with 3D Graphics Benchmark; 1.5 SH-X2: Frequency and Efficiency Enhanced Core; 1.5.1 Frequency Enhancement; 1.5.2 Low Power Technologies; 1.6 SH-X3: Multicore Architecture Extension; 1.6.1 SH-X3 Core Specifications; 1.6.2 Symmetric and Asymmetric Multiprocessor Support; 1.6.3 Core Snoop Sequence Optimization; 1.6.4 Dynamic Power Management; 1.6.5 RP-1 Prototype Chip; 1.6.6 RP-2 Prototype Chip; 1.7 SH-X4: ISA and Address Space Extension
1.7.1 SH-X4 Core Specifications1.7.2 Efficient ISA Extension; 1.7.3 Address Space Extension; 1.7.4 Data Transfer Unit; 1.7.5 RP-X Prototype Chip; References; 2: Special-Purpose Hardware for Computational Biology; 2.1 Molecular Dynamics Simulations on Graphics Processing Units; 2.1.1 Molecular Mechanics Force Fields; 2.1.2 Graphics Processing Units for MD Simulations; 2.2 Special-Purpose Hardware and Network Topologies for MD Simulations; 2.2.1 High-Throughput Interaction Subsystem; 2.2.2 Hardware Description of the Flexible Subsystem; 2.2.3 Performance and Conclusions
2.3 Quantum MC Applications on Field-Programmable Gate Arrays2.3.1 Energy Computation and WF Kernels; 2.3.2 Hardware Architecture; 2.3.3 PE and WF Computation Kernels; 2.4 Conclusions and Future Directions; References; 3: Embedded GPU Design; 3.1 Introduction; 3.2 System Architecture; 3.3 Graphics Modules Design; 3.3.1 RISC Processor; 3.3.2 Geometry Processor; 3.3.3 Rendering Engine; 3.4 System Power Management; 3.4.1 Multiple Power-Domain Management; 3.4.2 Power Management Unit; 3.5 Implementation Results; 3.5.1 Chip Implementation; 3.5.2 Comparisons; 3.6 Conclusion; References
4: Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors4.1 Introduction; 4.2 The DVP Interface; 4.3 The iBRIDGE-BB Architecture; 4.3.1 Configuring the iBRIDGE-BB; 4.3.2 Operation of the iBRIDGE-BB; 4.3.3 Description of Internal Blocks; 4.4 Hardware Implementation; 4.4.1 Verification in Field-Programmable Gate Array; 4.4.2 Application in Image Compression; 4.4.3 Application-Specific Integrated Circuit (ASIC) Synthesis and Performance Analysis; 4.5 Conclusion; Acknowledgments; References; 5: Embedded Computing Systems on FPGAs; 5.1 FPGA Architecture
5.2 FPGA Configuration Technology
Record Nr. UNINA-9910819603603321
Hoboken, N.J., : John Wiley & Sons, Inc., 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Fifth International Workshop on System-on-Chip for Real-Time Applications : proceedings : 20-24 July, 2005, Banff, Alberta, Canada
Fifth International Workshop on System-on-Chip for Real-Time Applications : proceedings : 20-24 July, 2005, Banff, Alberta, Canada
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2004
Disciplina 621.3815
Soggetto topico Application specific integrated circuits - Design and construction
Systems on a chip
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 1-5090-9941-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996206220603316
[Place of publication not identified], : IEEE Computer Society, 2004
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Fifth International Workshop on System-on-Chip for Real-Time Applications : proceedings : 20-24 July, 2005, Banff, Alberta, Canada
Fifth International Workshop on System-on-Chip for Real-Time Applications : proceedings : 20-24 July, 2005, Banff, Alberta, Canada
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2004
Disciplina 621.3815
Soggetto topico Application specific integrated circuits - Design and construction
Systems on a chip
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 1-5090-9941-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910142340703321
[Place of publication not identified], : IEEE Computer Society, 2004
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
High-speed photonics interconnects / / edited by Lukas Chrostowski, Krzysztof Iniewski
High-speed photonics interconnects / / edited by Lukas Chrostowski, Krzysztof Iniewski
Edizione [1st edition]
Pubbl/distr/stampa Boca Raton, Fla. : , : Taylor & Francis, , 2013
Descrizione fisica 1 online resource (217 p.)
Disciplina 621.36/5
Altri autori (Persone) ChrostowskiLukas
IniewskiKrzysztof
Collana Devices, Circuits, and Systems
Soggetto topico Interconnects (Integrated circuit technology)
Optical interconnects
Photonics
Soggetto genere / forma Electronic books.
ISBN 1-315-21637-X
1-4665-1604-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Contents; Preface; Editors; Contributors; Chapter 1 - Energy-Efficient Photonic Interconnects for Computing Platforms; Chapter 2 - Low-Loss, High-Performance Chip-to-Chip Electrical Connectivity Using Air-Clad Copper Interconnects; Chapter 3 - Silicon Photonic Bragg Gratings; Chapter 4 - Lasers for Optical Interconnects; Chapter 5 - Vertical-Cavity Surface-Emitting Lasers for Interconnects; Chapter 6 - High-Speed Photodiodes and Laser Power Converters for the Applications of Green Optical Interconnect; Chapter 7 - Quantum-Dot Nanophotonics for Photodetection
Chapter 8 - Rolled-Up Semiconductor Tube Optical CavitiesBack Cover
Record Nr. UNINA-9910462897103321
Boca Raton, Fla. : , : Taylor & Francis, , 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui