Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods |
Autore | Holdsworth B (Brian) |
Edizione | [4th ed.] |
Pubbl/distr/stampa | Oxford, : Newnes, 2002 |
Descrizione fisica | 1 online resource (535 p.) |
Disciplina | 321.395 |
Altri autori (Persone) | WoodsR. C (R. Clive) |
Soggetto topico |
Logic design
Digital electronics |
Soggetto genere / forma | Electronic books. |
ISBN |
1-281-22270-4
9786611222703 0-08-047730-5 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function 2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map 3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions 3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks 4.10 Symbolic circuit analysis for NAND and NOR networks |
Record Nr. | UNINA-9910457332303321 |
Holdsworth B (Brian)
![]() |
||
Oxford, : Newnes, 2002 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods |
Autore | Holdsworth B (Brian) |
Edizione | [4th ed.] |
Pubbl/distr/stampa | Oxford, : Newnes, 2002 |
Descrizione fisica | 1 online resource (535 p.) |
Disciplina | 321.395 |
Altri autori (Persone) | WoodsR. C (R. Clive) |
Soggetto topico |
Logic design
Digital electronics |
ISBN |
1-281-22270-4
9786611222703 0-08-047730-5 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function 2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map 3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions 3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks 4.10 Symbolic circuit analysis for NAND and NOR networks |
Record Nr. | UNINA-9910784329403321 |
Holdsworth B (Brian)
![]() |
||
Oxford, : Newnes, 2002 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
Digital logic design / / B. Holdsworth and R.C. Woods |
Autore | Holdsworth B (Brian) |
Edizione | [4th ed.] |
Pubbl/distr/stampa | Oxford, : Newnes, 2002 |
Descrizione fisica | 1 online resource (535 p.) |
Disciplina | 321.395 |
Altri autori (Persone) | WoodsR. C (R. Clive) |
Soggetto topico |
Logic design
Digital electronics |
ISBN |
1-281-22270-4
9786611222703 0-08-047730-5 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function 2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map 3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions 3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks 4.10 Symbolic circuit analysis for NAND and NOR networks |
Record Nr. | UNINA-9910808491603321 |
Holdsworth B (Brian)
![]() |
||
Oxford, : Newnes, 2002 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|