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Computer Aided Verification [[electronic resource] ] : 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007, Proceedings / / edited by Werner Damm, Holger Hermanns
Computer Aided Verification [[electronic resource] ] : 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007, Proceedings / / edited by Werner Damm, Holger Hermanns
Edizione [1st ed. 2007.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Descrizione fisica 1 online resource (XV, 562 p.)
Disciplina 006.3
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer science
Software engineering
Machine theory
Artificial intelligence
Logic design
Theory of Computation
Computer Science Logic and Foundations of Programming
Software Engineering
Formal Languages and Automata Theory
Artificial Intelligence
Logic Design
ISBN 3-540-73368-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talks -- Automatically Proving Program Termination -- A Mathematical Approach to RTL Verification -- Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development? -- Invited Tutorials -- Algorithms for Interface Synthesis -- A Tutorial on Satisfiability Modulo Theories -- A JML Tutorial: Modular Specification and Verification of Functional Behavior for Java -- Verification of Hybrid Systems -- Session I: Compositionality -- SAT-Based Compositional Verification Using Lazy Learning -- Local Proofs for Global Safety Properties -- Session II: Verification Process -- Low-Level Library Analysis and Summarization -- Verification Across Intellectual Property Boundaries -- Session III: Timed Synthesis and Games -- On Synthesizing Controllers from Bounded-Response Properties -- An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games -- UPPAAL-Tiga: Time for Playing Games! -- The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems -- Session IV: Infinitive State Verification -- Systematic Acceleration in Regular Model Checking -- Parameterized Verification of Infinite-State Processes with Global Conditions -- Session V: Tool Environment -- CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes -- jMoped: A Test Environment for Java Programs -- Hector: Software Model Checking with Cooperating Analysis Plugins -- The Why/Krakatoa/Caduceus Platform for Deductive Program Verification -- Session VI: Shapes -- Shape Analysis for Composite Data Structures -- Array Abstractions from Proofs -- Context-Bounded Analysis of Multithreaded Programs with Dynamic Linked Structures -- Revamping TVLA: Making Parametric Shape Analysis Competitive -- Session VII: Concurrent Program Verification -- Fast and Accurate Static Data-Race Detection for Concurrent Programs -- Parametric and Sliced Causality -- Spade: Verification of Multithreaded Dynamic and Recursive Programs -- Session VIII: Reactive Designs -- Anzu: A Tool for Property Synthesis -- RAT: A Tool for the Formal Analysis of Requirements -- Session IX: Parallelisation -- Parallelising Symbolic State-Space Generators -- I/O Efficient Accepting Cycle Detection -- Session X: Constraints and Decisions -- C32SAT: Checking C Expressions -- CVC3 -- BAT: The Bit-Level Analysis Tool -- LIRA: Handling Constraints of Linear Arithmetics over the Integers and the Reals -- Session XI: Probabilistic Verification -- Three-Valued Abstraction for Continuous-Time Markov Chains -- Magnifying-Lens Abstraction for Markov Decision Processes -- Underapproximation for Model-Checking Based on Random Cryptographic Constructions -- Session XII: Abstraction -- Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra -- Structural Abstraction of Software Verification Conditions -- An Abstract Domain for Analyzing Heap-Manipulating Low-Level Software -- Adaptive Symmetry Reduction -- Session XIII: Assume-Guarantee Reasoning -- From Liveness to Promptness -- Automated Assumption Generation for Compositional Verification -- Session XIV: Hybrid Systems -- Abstraction and Counterexample-Guided Construction of ?-Automata for Model Checking of Step-Discrete Linear Hybrid Models -- Test Coverage for Continuous and Hybrid Systems -- Hybrid Systems: From Verification to Falsification -- Session XV: Program Analysis -- Comparison Under Abstraction for Verifying Linearizability -- Leaping Loops in the Presence of Abstraction -- Configurable Software Verification: Concretizing the Convergence of Model Checking and Program Analysis -- Session XVI: SAT and Decision Procedures -- A Decision Procedure for Bit-Vectors and Arrays -- Boolean Abstraction for Temporal Logic Satisfiability -- A Lazy and Layered SMT( ) Solver for Hard Industrial Verification Problems.
Record Nr. UNISA-996466098303316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Materiale a stampa
Lo trovi qui: Univ. di Salerno
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Computer Aided Verification : 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007, Proceedings / / edited by Werner Damm, Holger Hermanns
Computer Aided Verification : 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007, Proceedings / / edited by Werner Damm, Holger Hermanns
Edizione [1st ed. 2007.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Descrizione fisica 1 online resource (XV, 562 p.)
Disciplina 006.3
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer science
Software engineering
Machine theory
Artificial intelligence
Logic design
Theory of Computation
Computer Science Logic and Foundations of Programming
Software Engineering
Formal Languages and Automata Theory
Artificial Intelligence
Logic Design
ISBN 3-540-73368-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talks -- Automatically Proving Program Termination -- A Mathematical Approach to RTL Verification -- Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development? -- Invited Tutorials -- Algorithms for Interface Synthesis -- A Tutorial on Satisfiability Modulo Theories -- A JML Tutorial: Modular Specification and Verification of Functional Behavior for Java -- Verification of Hybrid Systems -- Session I: Compositionality -- SAT-Based Compositional Verification Using Lazy Learning -- Local Proofs for Global Safety Properties -- Session II: Verification Process -- Low-Level Library Analysis and Summarization -- Verification Across Intellectual Property Boundaries -- Session III: Timed Synthesis and Games -- On Synthesizing Controllers from Bounded-Response Properties -- An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games -- UPPAAL-Tiga: Time for Playing Games! -- The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems -- Session IV: Infinitive State Verification -- Systematic Acceleration in Regular Model Checking -- Parameterized Verification of Infinite-State Processes with Global Conditions -- Session V: Tool Environment -- CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes -- jMoped: A Test Environment for Java Programs -- Hector: Software Model Checking with Cooperating Analysis Plugins -- The Why/Krakatoa/Caduceus Platform for Deductive Program Verification -- Session VI: Shapes -- Shape Analysis for Composite Data Structures -- Array Abstractions from Proofs -- Context-Bounded Analysis of Multithreaded Programs with Dynamic Linked Structures -- Revamping TVLA: Making Parametric Shape Analysis Competitive -- Session VII: Concurrent Program Verification -- Fast and Accurate Static Data-Race Detection for Concurrent Programs -- Parametric and Sliced Causality -- Spade: Verification of Multithreaded Dynamic and Recursive Programs -- Session VIII: Reactive Designs -- Anzu: A Tool for Property Synthesis -- RAT: A Tool for the Formal Analysis of Requirements -- Session IX: Parallelisation -- Parallelising Symbolic State-Space Generators -- I/O Efficient Accepting Cycle Detection -- Session X: Constraints and Decisions -- C32SAT: Checking C Expressions -- CVC3 -- BAT: The Bit-Level Analysis Tool -- LIRA: Handling Constraints of Linear Arithmetics over the Integers and the Reals -- Session XI: Probabilistic Verification -- Three-Valued Abstraction for Continuous-Time Markov Chains -- Magnifying-Lens Abstraction for Markov Decision Processes -- Underapproximation for Model-Checking Based on Random Cryptographic Constructions -- Session XII: Abstraction -- Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra -- Structural Abstraction of Software Verification Conditions -- An Abstract Domain for Analyzing Heap-Manipulating Low-Level Software -- Adaptive Symmetry Reduction -- Session XIII: Assume-Guarantee Reasoning -- From Liveness to Promptness -- Automated Assumption Generation for Compositional Verification -- Session XIV: Hybrid Systems -- Abstraction and Counterexample-Guided Construction of ?-Automata for Model Checking of Step-Discrete Linear Hybrid Models -- Test Coverage for Continuous and Hybrid Systems -- Hybrid Systems: From Verification to Falsification -- Session XV: Program Analysis -- Comparison Under Abstraction for Verifying Linearizability -- Leaping Loops in the Presence of Abstraction -- Configurable Software Verification: Concretizing the Convergence of Model Checking and Program Analysis -- Session XVI: SAT and Decision Procedures -- A Decision Procedure for Bit-Vectors and Arrays -- Boolean Abstraction for Temporal Logic Satisfiability -- A Lazy and Layered SMT( ) Solver for Hard Industrial Verification Problems.
Record Nr. UNINA-9910484352003321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
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CONCUR 2006 : concurrency theory : 17th international conference, CONCUR 2006, Bonn, Germany, August 27-30, 2006 : proceedings / / Christel Baier, Holger Hermanns (eds.)
CONCUR 2006 : concurrency theory : 17th international conference, CONCUR 2006, Bonn, Germany, August 27-30, 2006 : proceedings / / Christel Baier, Holger Hermanns (eds.)
Edizione [1st ed. 2006.]
Pubbl/distr/stampa Berlin, : Springer, 2006
Descrizione fisica 1 online resource (XIII, 525 p.)
Disciplina 004/.35
Altri autori (Persone) BaierChristel
HermannsHolger <1967->
Collana Lecture notes in computer science
LNCS sublibrary. SL 1, Theoretical computer science and general issues
Soggetto topico Parallel processing (Electronic computers)
ISBN 3-540-37377-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Contributions -- Modeling Timed Concurrent Systems -- Some Remarks on Definability of Process Graphs -- Sanity Checks in Formal Verification -- Invited Tutorials -- Welcome to the Jungle: A Subjective Guide to Mobile Process Calculi -- Probability and Nondeterminism in Operational Models of Concurrency -- Model Checking -- A Livelock Freedom Analysis for Infinite State Asynchronous Reactive Systems -- Proving Liveness by Backwards Reachability -- Model Checking Quantified Computation Tree Logic -- Process Calculi -- Liveness, Fairness and Impossible Futures -- Checking a Mutex Algorithm in a Process Algebra with Fairness -- A Complete Axiomatic Semantics for the CSP Stable-Failures Model -- Transition Systems of Elementary Net Systems with Localities -- Minimization and Equivalence Checking -- Operational Determinism and Fast Algorithms -- Minimization, Learning, and Conformance Testing of Boolean Programs -- A Capability Calculus for Concurrency and Determinism -- Types -- A New Type System for Deadlock-Free Processes -- Sortings for Reactive Systems -- Dynamic Access Control in a Concurrent Object Calculus -- Semantics -- Concurrent Rewriting for Graphs with Equivalences -- Event Structure Semantics for Nominal Calculi -- Encoding ?Duce in the ??-Calculus -- Probability -- A Complete Axiomatisation of Branching Bisimulation for Probabilistic Systems with an Application in Protocol Verification -- Probabilistic I/O Automata: Theories of Two Equivalences -- Reachability in Recursive Markov Decision Processes -- Strategy Improvement for Stochastic Rabin and Streett Games -- Bisimulation and Simulation -- Weak Bisimulation Up to Elaboration -- Generic Forward and Backward Simulations -- On Finite Alphabets and Infinite Bases III: Simulation -- Real Time -- Inference of Event-Recording Automata Using Timed Decision Trees -- Controller Synthesis for MTL Specifications -- On Interleaving in Timed Automata -- Formal Languages -- A Language for Task Orchestration and Its Semantic Properties -- Finding Shortest Witnesses to the Nonemptiness of Automata on Infinite Words -- Second-Order Simple Grammars.
Record Nr. UNINA-9910483851903321
Berlin, : Springer, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Tools and algorithms for the construction and analysis of systems : 12th international conference, TACAS 2006, held as part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2006, Vienna, Austria, March 25 - April 2, 2006 : proceedings / / Holger Hermanns, Jens Palsberg (eds.)
Tools and algorithms for the construction and analysis of systems : 12th international conference, TACAS 2006, held as part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2006, Vienna, Austria, March 25 - April 2, 2006 : proceedings / / Holger Hermanns, Jens Palsberg (eds.)
Edizione [1st ed. 2006.]
Pubbl/distr/stampa Berlin ; ; New York, : Springer, 2006
Descrizione fisica 1 online resource (XVI, 512 p.)
Disciplina 005.1
Altri autori (Persone) HermannsHolger <1967->
PalsbergJens
Collana Lecture notes in computer science
LNCS sublibrary. SL 1, Theoretical computer science and general issues
Soggetto topico System design
Computer software - Development
ISBN 3-540-33057-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Contributions -- Weighted Pushdown Systems and Trust-Management Systems -- Parametrization and Slicing -- Automatic Verification of Parameterized Data Structures -- Parameterized Verification of ?-Calculus Systems -- Easy Parameterized Verification of Biphase Mark and 8N1 Protocols -- Evaluating the Effectiveness of Slicing for Model Reduction of Concurrent Object-Oriented Programs -- Symbolic Techniques -- New Metrics for Static Variable Ordering in Decision Diagrams -- Widening ROBDDs with Prime Implicants -- Efficient Guided Symbolic Reachability Using Reachability Expressions -- Satisfiability -- SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in a Separation Logic Solver -- SAT-Based Software Certification -- Expressiveness + Automation + Soundness: Towards Combining SMT Solvers and Interactive Proof Assistants -- Exploration of the Capabilities of Constraint Programming for Software Verification -- Abstraction -- Counterexample-Guided Abstraction Refinement for the Analysis of Graph Transformation Systems -- Why Waste a Perfectly Good Abstraction? -- Efficient Abstraction Refinement in Interpolation-Based Unbounded Model Checking -- Approximating Predicate Images for Bit-Vector Logic -- Model Checking Algorithms -- Finitary Winning in ?-Regular Games -- Efficient Model Checking for LTL with Partial Order Snapshots -- A Local Shape Analysis Based on Separation Logic -- Program Verification -- Compositional Model Extraction for Higher-Order Concurrent Programs -- A Region Graph Based Approach to Termination Proofs -- Verifying Concurrent Message-Passing C Programs with Recursive Calls -- Automata-Based Verification of Programs with Tree Updates -- Runtime Diagnostics -- An Experimental Comparison of the Effectiveness of Control Flow Based Testing Approaches on Seeded Faults -- Exploiting Traces in Program Analysis -- Quantitative Techniques -- Model-Checking Markov Chains in the Presence of Uncertainties -- Safety Metric Temporal Logic Is Fully Decidable -- Simulation-Based Graph Similarity -- Tool Demonstrations -- PRISM: A Tool for Automatic Verification of Probabilistic Systems -- DISTRIBUTOR and BCG_MERGE: Tools for Distributed Explicit State Space Generation -- mcmas: A Model Checker for Multi-agent Systems -- MSCan – A Tool for Analyzing MSC Specifications -- Refinement -- A Practical and Complete Approach to Predicate Refinement -- Counterexample Driven Refinement for Abstract Interpretation -- Abstraction Refinement with Craig Interpolation and Symbolic Pushdown Systems.
Altri titoli varianti TACAS 2006
ETAPS 2006
Joint European Conferences on Theory and Practice of Software
Record Nr. UNINA-9910768468103321
Berlin ; ; New York, : Springer, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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