Computer Aided Verification [[electronic resource] ] : 8th International Conference, CAV '96, New Brunswick, NJ, USA, July 31 - August 3, 1996. Proceedings / / edited by Rajeev Alur, Thomas Henzinger |
Edizione | [1st ed. 1996.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1996 |
Descrizione fisica | 1 online resource (XIII, 479 p.) |
Disciplina | 005.1015113 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Computer logic
Computers Computer hardware Software engineering Mathematical logic Special purpose computers Logics and Meanings of Programs Theory of Computation Computer Hardware Software Engineering Mathematical Logic and Formal Languages Special Purpose and Application-Based Systems |
ISBN | 3-540-68599-5 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Symbolic verification of communication protocols with infinite state spaces using QDDs -- A conjunctively decomposed boolean representation for symbolic model checking -- Symbolic model checking using algebraic geometry -- A partition refinement algorithm for the ?-calculus -- Polynomial time algorithms for testing probabilistic bisimulation and simulation -- Pushdown processes: Games and model checking -- Module checking -- Automatic verification of parameterized synchronous systems -- HORNSAT, model checking, verification and games -- Verifying the SRT division algorithm using theorem proving techniques -- Modular verification of SRT division -- Mechanically verifying a family of multiplier circuits -- Verifying systems with replicated components in mur? -- Verification of arithmetic circuits by comparing two similar circuits -- Automated deduction and formal methods -- A platform for combining deductive with algorithmic verification -- Verifying invariants using theorem proving -- Deductive model checking -- Automated verification by induction with associative-commutative operators -- Analysis of timed systems based on time-abstracting bisimulations -- Verification of an Audio Protocol with bus collision using Uppaal -- Selective quantitative analysis and interval model checking: Verifying different facets of a system -- Verifying continuous time Markov chains -- Verifying safety properties of differential equations -- Temporal verification by diagram transformations -- Protocol verification by aggregation of distributed transactions -- Atomicity refinement and trace reduction theorems -- Powerful techniques for the automatic generation of invariants -- Saving space by fully exploiting invisible transitions -- Using on-the-fly verification techniques for the generation of test suites -- Automatic translation of natural language system specifications into temporal logic -- Verification of fair transition systems -- The state of Spin -- The Mur ? verification system -- The NCSU Concurrency Workbench -- The Concurrency Factory: A development environment for concurrent systems -- XVERSA: An integrated graphical and textual toolset for the specification and analysis of resource-bound real-time systems -- EVP: Integration of FDTs for the analysis and verification of communication protocols -- PVS: Combining specification, proof checking, and model checking -- STeP: Deductive-algorithmic verification of reactive and real-time systems -- Symbolic model checking -- COSPAN -- VIS: A system for verification and synthesis -- MDG tools for the verification of RTL designs -- CADP a protocol validation and verification toolbox -- The FC2TOOLS set -- The Real-Time Graphical Interval Logic toolset -- The METAFrame'95 environment -- Verification Support Environment -- Marrella: A tool for simulation and verification -- Verifying the safety of a practical concurrent garbage collector -- Verification by behaviour abstraction. |
Record Nr. | UNISA-996465658903316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1996 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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Proceedings of the joint meeting of the twenty-third EACSL annual Conference on Computer Science Logic (CSL) and the twenty-ninth annual ACM/IEEE Symposium on Logic in Computer Science (LICS |
Autore | Henzinger Thomas |
Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2014 |
Descrizione fisica | 1 online resource (764 pages) |
Collana | ACM Conferences |
Soggetto topico |
Engineering & Applied Sciences
Computer Science |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti |
Joint meeting of the twenty-third EACSL annual Conference on Computer Science Logic (CSL) and the twenty-ninth annual ACM/IEEE Symposium on Logic in Computer Science (LICS), Vienna, Austria - July 14-18, 2014
CSL-LICS '14 |
Record Nr. | UNINA-9910376364803321 |
Henzinger Thomas | ||
[Place of publication not identified], : ACM, 2014 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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