Rapid system prototyping with FPGAs [[electronic resource] /] / by R.C. Cofer and Benjamin F. Harding |
Autore | Cofer R. C |
Edizione | [1st edition] |
Pubbl/distr/stampa | Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 |
Descrizione fisica | 1 online resource (321 p.) |
Disciplina | 621.381 |
Altri autori (Persone) | HardingBenjamin F |
Collana | Embedded technology series |
Soggetto topico |
Digital electronics - Computer-aided design
Field programmable gate arrays Rapid prototyping |
Soggetto genere / forma | Electronic books. |
ISBN |
1-280-64257-2
9786610642571 0-08-045737-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Rapid System Prototyping with FPGAs; Contents; Acknowledgements; About the Authors; 1 Introduction; 2 FPGA Fundamentals; 3 Optimizing the Development Cycle; 4 System Engineering; 5 FPGA Device-Level Design Decisions; 6 Board-Level Design Decisions and Allocation; 7 Design Implementation; 8 Design Simulation; 9 Design Constraints and Optimization; 10 Configuration; 11 Board-Level Testing; 12 Advanced Topics Introduction; 13 Cores and Intellectual Property; 14 Embedded Processing Cores; 15 Digital Signal Processing; 16 Advanced Interconnect; 17 Bringing It All Together
A Rapid System Prototyping Technical ReferencesB Design Phases; Abbreviations and Acronyms; Index |
Record Nr. | UNINA-9910457319603321 |
Cofer R. C | ||
Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Rapid system prototyping with FPGAs [[electronic resource] /] / by R.C. Cofer and Benjamin F. Harding |
Autore | Cofer R. C |
Edizione | [1st edition] |
Pubbl/distr/stampa | Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 |
Descrizione fisica | 1 online resource (321 p.) |
Disciplina | 621.381 |
Altri autori (Persone) | HardingBenjamin F |
Collana | Embedded technology series |
Soggetto topico |
Digital electronics - Computer-aided design
Field programmable gate arrays Rapid prototyping |
ISBN |
1-280-64257-2
9786610642571 0-08-045737-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Rapid System Prototyping with FPGAs; Contents; Acknowledgements; About the Authors; 1 Introduction; 2 FPGA Fundamentals; 3 Optimizing the Development Cycle; 4 System Engineering; 5 FPGA Device-Level Design Decisions; 6 Board-Level Design Decisions and Allocation; 7 Design Implementation; 8 Design Simulation; 9 Design Constraints and Optimization; 10 Configuration; 11 Board-Level Testing; 12 Advanced Topics Introduction; 13 Cores and Intellectual Property; 14 Embedded Processing Cores; 15 Digital Signal Processing; 16 Advanced Interconnect; 17 Bringing It All Together
A Rapid System Prototyping Technical ReferencesB Design Phases; Abbreviations and Acronyms; Index |
Record Nr. | UNINA-9910784364403321 |
Cofer R. C | ||
Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Rapid system prototyping with FPGAs / / by R.C. Cofer and Benjamin F. Harding |
Autore | Cofer R. C |
Edizione | [1st edition] |
Pubbl/distr/stampa | Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 |
Descrizione fisica | 1 online resource (321 p.) |
Disciplina | 621.381 |
Altri autori (Persone) | HardingBenjamin F |
Collana | Embedded technology series |
Soggetto topico |
Digital electronics - Computer-aided design
Field programmable gate arrays Rapid prototyping |
ISBN |
1-280-64257-2
9786610642571 0-08-045737-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Rapid System Prototyping with FPGAs; Contents; Acknowledgements; About the Authors; 1 Introduction; 2 FPGA Fundamentals; 3 Optimizing the Development Cycle; 4 System Engineering; 5 FPGA Device-Level Design Decisions; 6 Board-Level Design Decisions and Allocation; 7 Design Implementation; 8 Design Simulation; 9 Design Constraints and Optimization; 10 Configuration; 11 Board-Level Testing; 12 Advanced Topics Introduction; 13 Cores and Intellectual Property; 14 Embedded Processing Cores; 15 Digital Signal Processing; 16 Advanced Interconnect; 17 Bringing It All Together
A Rapid System Prototyping Technical ReferencesB Design Phases; Abbreviations and Acronyms; Index |
Record Nr. | UNINA-9910823741903321 |
Cofer R. C | ||
Amsterdam ; ; Boston, : Elsevier/Newnes, c2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|