top

  Info

  • Utilizzare la checkbox di selezione a fianco di ciascun documento per attivare le funzionalità di stampa, invio email, download nei formati disponibili del (i) record.

  Info

  • Utilizzare questo link per rimuovere la selezione effettuata.
Embedded Computer Systems: Architectures, Modeling, and Simulation [[electronic resource] ] : 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings / / edited by Stamatis Vassiliadis, Stephan Wong, Timo D. Hämäläinen
Embedded Computer Systems: Architectures, Modeling, and Simulation [[electronic resource] ] : 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings / / edited by Stamatis Vassiliadis, Stephan Wong, Timo D. Hämäläinen
Edizione [1st ed. 2006.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2006
Descrizione fisica 1 online resource (XV, 492 p.)
Disciplina 004.2/2
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer systems
Computers
Microprocessors
Computer architecture
Computer networks
Electronic digital computers—Evaluation
Computer System Implementation
Computer Hardware
Processor Architectures
Computer Communication Networks
System Performance and Evaluation
ISBN 3-540-36411-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Keynotes -- Reconfigurable Platform for Digital Convergence Terminals -- European Research in Embedded Systems -- System Design and Modeling -- Interface Overheads in Embedded Multimedia Software -- A UML Profile for Asynchronous Hardware Design -- Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform -- Towards a Transformation Chain Modeling Language -- Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development -- Domain-Specific Modeling of Power Aware Distributed Real-Time Embedded Systems -- Mining Dynamic Document Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL -- An Optimization Methodology for Memory Allocation and Task Scheduling in SoCs Via Linear Programming -- Wireless Sensor Networks -- Designing Wireless Sensor Nodes -- Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring -- LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network -- An Approach for the Reduction of Power Consumption in Sensor Nodes of Wireless Sensor Networks: Case Analysis of Mica2 -- Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks -- Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks -- Security in Wireless Sensor Networks: Considerations and Experiments -- On Security of PAN Wireless Systems -- Processor Design -- Code Size Reduction by Compiler Tuning -- Energy Optimization of a Multi-bank Main Memory -- Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems -- Hybrid Functional and Instruction Level Power Modeling for Embedded Processors -- Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform -- Software Pipelining Support for Transport Triggered Architecture Processors -- SAD Prefetching for MPEG4 Using Flux Caches -- Effects of Program Compression -- Integrated Instruction Scheduling and Fine-Grain Register Allocation for Embedded Processors -- Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations -- A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme -- Reducing Execution Unit Leakage Power in Embedded Processors -- Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors -- Advantages of Java Processors in Cache Performance and Power for Embedded Applications -- Dependable Computing -- CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation -- A Scheduling Strategy for a Real-Time Dependable Organic Middleware -- Autonomous Construction Technology of Community for Achieving High Assurance Service -- Preventing Denial-of-Service Attacks in Shared CMP Caches -- Architectures and Implementations -- A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures -- Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring -- Design of Asynchronous Embedded Processor with New Ternary Data Encoding Scheme -- Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator -- A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems -- Rescheduling for Optimized SHA-1 Calculation -- Software Implementation of WiMAX on the Sandbridge SandBlaster Platform -- High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology -- Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box -- Embedded Sensor Systems -- Integrated Microsystems in Industrial Applications -- A Solid-State 2-D Wind Sensor -- Fault-Tolerant Bus System for Airbag Sensors and Actuators.
Record Nr. UNISA-996465573703316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2006
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Embedded Computer Systems: Architectures, Modeling, and Simulation [[electronic resource] ] : 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, Proceedings / / edited by Timo D. Hämäläinen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis
Embedded Computer Systems: Architectures, Modeling, and Simulation [[electronic resource] ] : 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, Proceedings / / edited by Timo D. Hämäläinen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis
Edizione [1st ed. 2005.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Descrizione fisica 1 online resource (XV, 476 p.)
Disciplina 004.2/2
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer science
Computers
Microprocessors
Computer architecture
Computer networks
Electronic digital computers—Evaluation
Computer systems
Theory of Computation
Computer Hardware
Processor Architectures
Computer Communication Networks
System Performance and Evaluation
Computer System Implementation
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Keynote -- Platform Thinking in Embedded Systems -- Reconfigurable System Design and Implementations -- Interprocedural Optimization for Dynamic Hardware Configurations -- Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques -- Reconfigurable Multiple Operation Array -- RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration -- Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping -- Automatic FIR Filter Generation for FPGAs -- Two-Dimensional Fast Cosine Transform for Vector-STA Architectures -- Configurable Computing for High-Security/High-Performance Ambient Systems -- FPL-3E: Towards Language Support for Reconfigurable Packet Processing -- Processor Architectures, Design and Simulation -- Flux Caches: What Are They and Are They Useful? -- First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption -- A Novel JAVA Processor for Embedded Devices -- Formal Specification of a Protocol Processor -- Tuning a Protocol Processor Architecture Towards DSP Operations -- Observations on Power-Efficiency Trends in Mobile Communication Devices -- CORDIC-Augmented Sandbridge Processor for Channel Equalization -- Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic -- Exploiting Intra-function Correlation with the Global History Stack -- Power Efficient Instruction Caches for Embedded Systems -- Micro-architecture Performance Estimation by Formula -- Offline Phase Analysis and Optimization for Multi-configuration Processors -- Hardware Cost Estimation for Application-Specific Processor Design -- Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures -- Generating Stream Based Code from Plain C -- Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First -- A Programming Model for an Embedded Media Processing Architecture -- Automatic ADL-Based Assembler Generation for ASIP Programming Support -- Sandbridge Software Tools -- Architectures and Implementations -- A Hardware Accelerator for Controlling Access to Multiple-Unit Resources in Safety/Time-Critical Systems -- Pattern Matching Acceleration for Network Intrusion Detection Systems -- Real-Time Stereo Vision on a Reconfigurable System -- Application of Very Fast Simulated Reannealing (VFSR) to Low Power Design -- Compressed Swapping for NAND Flash Memory Based Embedded Systems -- A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms -- A Scalable Embedded JPEG2000 Architecture -- A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design -- Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context -- DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor -- System Level Design, Modeling and Simulation -- Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets -- High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks -- The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models -- Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow -- Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms -- DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context -- SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC -- Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications -- A Case for Visualization-Integrated System-Level Design Space Exploration -- Mixed Virtual/Real Prototypes for Incremental System Design – A Proof of Concept.
Record Nr. UNISA-996465831203316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui