Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping [[electronic resource] ] : Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992. Selected Papers / / edited by Herbert Grünbacher, Reiner W. Hartenstein |
Edizione | [1st ed. 1993.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 |
Descrizione fisica | 1 online resource (IX, 223 p.) |
Disciplina | 621.39/5 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Architecture, Computer
Electronic circuits Logic design Electronics Microelectronics Computer System Implementation Circuits and Systems Logic Design Electronics and Microelectronics, Instrumentation |
ISBN | 3-540-47902-3 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Overview of complex array-based PLDs -- Technologies and utilization of Field Programmable Gate Arrays -- Some considerations on Field Programmable Gate Arrays and their impact on system design -- SRAM-based FPGAs ease system verification -- MONTAGE: An FPGA for synchronous and asynchronous circuits -- ORCA: A new architecture for high-performance FPGAs -- Patching method for lookup-table type FPGA's -- Automatic one-hot re-encoding for FPGAs -- Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays -- Self-organizing Kohonen maps for FPGA placement -- High level synthesis in an FPGA-based computer aided prototyping environment -- New application of FPGAs to programmable digital communication circuits -- FPGA based logic synthesis of squarers using VHDL -- Optimized fuzzy controller architecture for field programmable gate arrays -- A real-time kernel — Rapid prototyping with VHDL and FPGAs -- JAPROC — A 8 bit micro controller design and its test environment -- Chameleon: A workstation of a different colour -- A highly parallel FPGA-based machine and its formal verification -- FPGA based self-test with deterministic test patterns -- FPGA implementation of systolic sequence alignment -- Using FPGAs to prototype a self-timed computer -- Using FPGAs to implement a reconfigurable highly parallel computer -- Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic. |
Record Nr. | UNISA-996466153503316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
|
Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing [[electronic resource] ] : 10th International Conference, FPL 2000 Villach, Austria, August 27-30, 2000 Proceedings / / edited by Reiner W. Hartenstein, Herbert Grünbacher |
Edizione | [1st ed. 2000.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000 |
Descrizione fisica | 1 online resource (XXXIV, 858 p.) |
Disciplina | 621.39/5 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Architecture, Computer
Logic design Computer System Implementation Logic Design |
ISBN | 3-540-44614-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Invited Keynote -- Network Processors -- Prototyping -- Dynamically Reconfigurable I -- Miscellaneous I -- Technology Mapping and Routing & Placement -- Biologically Inspired Methods -- Invited Keynote -- Invited Papers -- Mobile Communication -- Dynamically Reconfigurable II -- Design Space Exploration -- Miscellaneous II -- Applications I -- Optimization -- Invited Keynote -- Invited Paper -- Architectures -- Methodology and Technology -- Compilation and Related Issues -- Applications II -- Short Papers. |
Record Nr. | UNISA-996465372903316 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
|
Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing : 10th International Conference, FPL 2000 Villach, Austria, August 27-30, 2000 Proceedings / / edited by Reiner W. Hartenstein, Herbert Grünbacher |
Edizione | [1st ed. 2000.] |
Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000 |
Descrizione fisica | 1 online resource (XXXIV, 858 p.) |
Disciplina | 621.39/5 |
Collana | Lecture Notes in Computer Science |
Soggetto topico |
Architecture, Computer
Logic design Computer System Implementation Logic Design |
ISBN | 3-540-44614-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Invited Keynote -- Network Processors -- Prototyping -- Dynamically Reconfigurable I -- Miscellaneous I -- Technology Mapping and Routing & Placement -- Biologically Inspired Methods -- Invited Keynote -- Invited Papers -- Mobile Communication -- Dynamically Reconfigurable II -- Design Space Exploration -- Miscellaneous II -- Applications I -- Optimization -- Invited Keynote -- Invited Paper -- Architectures -- Methodology and Technology -- Compilation and Related Issues -- Applications II -- Short Papers. |
Record Nr. | UNINA-9910143621103321 |
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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