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Applied Reconfigurable Computing [[electronic resource] ] : 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings / / edited by Christian Hochberger, Brent Nelson, Andreas Koch, Roger Woods, Pedro Diniz
| Applied Reconfigurable Computing [[electronic resource] ] : 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings / / edited by Christian Hochberger, Brent Nelson, Andreas Koch, Roger Woods, Pedro Diniz |
| Edizione | [1st ed. 2019.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 |
| Descrizione fisica | 1 online resource (XIII, 418 p. 217 illus., 110 illus. in color.) |
| Disciplina | 004 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Operating systems (Computers) Software engineering Computer systems Computers, Special purpose Artificial intelligence Computer Hardware Operating Systems Software Engineering Computer System Implementation Special Purpose and Application-Based Systems Artificial Intelligence |
| ISBN | 3-030-17227-9 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Applications -- Fault-Tolerant Architecture for On-Board Dual-Core Synthetic-Aperture Radar Imaging -- Optimizing CNN-based Hyperspectral Image Classification on FPGAs -- Supporting Columnar In-Memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow -- A Novel Encoder for TDCs -- A Resource Reduced Application-Specific FPGA Switch -- Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications -- Partial Reconfiguration and Security -- Probabilistic Performance Modelling when using Partial Reconfiguration to Accelerate Streaming Applications with Non-Deterministic Task Scheduling -- Leveraging the Partial Reconfiguration Capability of FPGAs for Processor-Based Fail-Operational Systems -- (ReCo)Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-based Countermeasures on FPGAs -- Proof-Carrying Hardware versus the Stealthy Malicious LUT Hardware Trojan -- Secure Local Configuration of Intellectual Property Without a Trusted Third Party -- Image/Video Processing -- HiFlipVX: an Open Source High-Level Synthesis FPGA Library for Image Processing -- Real-time FPGA implementation of connected component labelling for a 4K video stream -- A Scalable FPGA-based Architecture for Depth Estimation in SLAM -- High-Level Synthesis -- Evaluating LULESH Kernels on OpenCL FPGA -- The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems -- Graph-based Code Restructuring Targeting HLS for FPGAs -- CGRAs and Vector Processing -- UltraSynth: Integration of a CGRA into a Control Engineering Environment -- Exploiting reconfigurable vector processing for energy-efficient computation in 3D-stacked memories -- Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms -- Architectures -- ReM: a Reconfigurable Multipotent Cell for New Distributed Reconfigurable Architectures -- Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators -- Design Frameworks and Methodology -- Hybrid Prototyping for Manycore Design and Validation -- Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks -- Invited Talk -- Third Party CAD Tools for FPGA Design | A Survey of the Current Landscape -- Convolutional Neural Networks -- Filter-wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation -- Exploring Data Size to Run Convolutional Neural Networks in Low Density FPGAs -- Faster Convolutional Neural Networks in Low Density FPGAs using Block Pruning. |
| Record Nr. | UNISA-996466302503316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Applied Reconfigurable Computing : 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings / / edited by Christian Hochberger, Brent Nelson, Andreas Koch, Roger Woods, Pedro Diniz
| Applied Reconfigurable Computing : 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9–11, 2019, Proceedings / / edited by Christian Hochberger, Brent Nelson, Andreas Koch, Roger Woods, Pedro Diniz |
| Edizione | [1st ed. 2019.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 |
| Descrizione fisica | 1 online resource (XIII, 418 p. 217 illus., 110 illus. in color.) |
| Disciplina | 004 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Operating systems (Computers) Software engineering Computer systems Computers, Special purpose Artificial intelligence Computer Hardware Operating Systems Software Engineering Computer System Implementation Special Purpose and Application-Based Systems Artificial Intelligence |
| ISBN | 3-030-17227-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Applications -- Fault-Tolerant Architecture for On-Board Dual-Core Synthetic-Aperture Radar Imaging -- Optimizing CNN-based Hyperspectral Image Classification on FPGAs -- Supporting Columnar In-Memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow -- A Novel Encoder for TDCs -- A Resource Reduced Application-Specific FPGA Switch -- Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications -- Partial Reconfiguration and Security -- Probabilistic Performance Modelling when using Partial Reconfiguration to Accelerate Streaming Applications with Non-Deterministic Task Scheduling -- Leveraging the Partial Reconfiguration Capability of FPGAs for Processor-Based Fail-Operational Systems -- (ReCo)Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-based Countermeasures on FPGAs -- Proof-Carrying Hardware versus the Stealthy Malicious LUT Hardware Trojan -- Secure Local Configuration of Intellectual Property Without a Trusted Third Party -- Image/Video Processing -- HiFlipVX: an Open Source High-Level Synthesis FPGA Library for Image Processing -- Real-time FPGA implementation of connected component labelling for a 4K video stream -- A Scalable FPGA-based Architecture for Depth Estimation in SLAM -- High-Level Synthesis -- Evaluating LULESH Kernels on OpenCL FPGA -- The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems -- Graph-based Code Restructuring Targeting HLS for FPGAs -- CGRAs and Vector Processing -- UltraSynth: Integration of a CGRA into a Control Engineering Environment -- Exploiting reconfigurable vector processing for energy-efficient computation in 3D-stacked memories -- Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms -- Architectures -- ReM: a Reconfigurable Multipotent Cell for New Distributed Reconfigurable Architectures -- Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators -- Design Frameworks and Methodology -- Hybrid Prototyping for Manycore Design and Validation -- Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks -- Invited Talk -- Third Party CAD Tools for FPGA Design | A Survey of the Current Landscape -- Convolutional Neural Networks -- Filter-wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation -- Exploring Data Size to Run Convolutional Neural Networks in Low Density FPGAs -- Faster Convolutional Neural Networks in Low Density FPGAs using Block Pruning. |
| Record Nr. | UNINA-9910337562203321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Applied Reconfigurable Computing. Architectures, Tools, and Applications [[electronic resource] ] : 16th International Symposium, ARC 2020, Toledo, Spain, April 1–3, 2020, Proceedings / / edited by Fernando Rincón, Jesús Barba, Hayden K. H. So, Pedro Diniz, Julián Caba
| Applied Reconfigurable Computing. Architectures, Tools, and Applications [[electronic resource] ] : 16th International Symposium, ARC 2020, Toledo, Spain, April 1–3, 2020, Proceedings / / edited by Fernando Rincón, Jesús Barba, Hayden K. H. So, Pedro Diniz, Julián Caba |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (XIII, 404 p. 180 illus., 126 illus. in color.) |
| Disciplina | 004 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Computer systems Computers, Special purpose Computer networks Software engineering Computer Hardware Computer System Implementation Special Purpose and Application-Based Systems Computer Communication Networks Software Engineering |
| ISBN | 3-030-44534-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Design Methods & Tools -- Design Space Exploration & Estimation Techniques -- High-level Synthesis -- Architectures -- Applications. . |
| Record Nr. | UNISA-996418222903316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Applied Reconfigurable Computing. Architectures, Tools, and Applications : 16th International Symposium, ARC 2020, Toledo, Spain, April 1–3, 2020, Proceedings / / edited by Fernando Rincón, Jesús Barba, Hayden K. H. So, Pedro Diniz, Julián Caba
| Applied Reconfigurable Computing. Architectures, Tools, and Applications : 16th International Symposium, ARC 2020, Toledo, Spain, April 1–3, 2020, Proceedings / / edited by Fernando Rincón, Jesús Barba, Hayden K. H. So, Pedro Diniz, Julián Caba |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (XIII, 404 p. 180 illus., 126 illus. in color.) |
| Disciplina | 004 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Computer systems Computers, Special purpose Computer networks Software engineering Computer Hardware Computer System Implementation Special Purpose and Application-Based Systems Computer Communication Networks Software Engineering |
| ISBN | 3-030-44534-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Design Methods & Tools -- Design Space Exploration & Estimation Techniques -- High-level Synthesis -- Architectures -- Applications. . |
| Record Nr. | UNINA-9910409679103321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Reconfigurable Computing: Architectures, Tools and Applications [[electronic resource] ] : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings / / edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz
| Reconfigurable Computing: Architectures, Tools and Applications [[electronic resource] ] : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings / / edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 |
| Descrizione fisica | 1 online resource (XVI, 238 p. 104 illus.) |
| Disciplina | 006.3 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Computer engineering Computer networks Algorithms Computer Hardware Computer Engineering and Networks |
| ISBN | 3-642-36812-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications -- Hardware Acceleration of Genetic Sequence Alignment -- An FPGA Acceleration for the Kd-tree Search in Photon Mapping -- SEU Resilience of DES, AES in SRAM-based FPGA -- An Architecture for IPv6 Lookup Using Parallel Index Generation Units -- Hardware Index to Set Partition Converter -- Teaching SoC Using Video Games to Improve Student Engagement -- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing -- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields -- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms -- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses -- Parametric Optimization of Reconfigurable Designs using Machine Learning -- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA -- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability -- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA. |
| Record Nr. | UNISA-996465621603316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings / / edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz
| Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013, Proceedings / / edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro Diniz |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 |
| Descrizione fisica | 1 online resource (XVI, 238 p. 104 illus.) |
| Disciplina | 006.3 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computers
Computer engineering Computer networks Algorithms Computer Hardware Computer Engineering and Networks |
| ISBN | 3-642-36812-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications -- Hardware Acceleration of Genetic Sequence Alignment -- An FPGA Acceleration for the Kd-tree Search in Photon Mapping -- SEU Resilience of DES, AES in SRAM-based FPGA -- An Architecture for IPv6 Lookup Using Parallel Index Generation Units -- Hardware Index to Set Partition Converter -- Teaching SoC Using Video Games to Improve Student Engagement -- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing -- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields -- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms -- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses -- Parametric Optimization of Reconfigurable Designs using Machine Learning -- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA -- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability -- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA. |
| Record Nr. | UNINA-9910485024003321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||