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Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
621.395
Altri autori (Persone) BioulGéry Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
Soggetto genere / forma Electronic books.
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910143556503321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
621.395
Altri autori (Persone) BioulGéry Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910830658403321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
Altri autori (Persone) BioulGery Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910877459603321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui