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Issues and practices [[electronic resource] /] / edited by Patrick Crowley ... [et al.]
| Issues and practices [[electronic resource] /] / edited by Patrick Crowley ... [et al.] |
| Pubbl/distr/stampa | San Francisco, : Morgan Kaufmann, 2005 |
| Descrizione fisica | 1 online resource (335 p.) |
| Disciplina | 621.395 |
| Altri autori (Persone) | CrowleyPatrick |
| Collana | Network processor design |
| Soggetto topico |
Network processors - Design
Application-specific integrated circuits - Design |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-280-62622-4
9786610626229 0-08-051250-X |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Network Processor Design Issues and Practices; Copyright Page; About the Editors; Contents; Preface; Chapter 1. Network Processors: New Horizons; 1.1 Architecture; 1.2 Tools and Techniques; 1.3 Applications; 1.4 Conclusions; References; Chapter 2. Supporting Mixed Real-Time Workloads in Multithreaded Processors with Segmented Instruction Caches; 2.1 Instruction Delivery in NP Data Processors; 2.2 Segmented Instruction Cache; 2.3 Experimental Evaluation; 2.4 Related Work; 2.5 Conclusions and Future Work; References; Chapter 3. Efficient Packet Classification with Digest Caches
3.1 Related Work3.2 Our Approach; 3.3 Evaluation; 3.4 Hardware Overhead; 3.5 Conclusions; Acknowledgments; References; Chapter 4. Towards a Flexible Network Processor Interface for RapidIO, Hypertransport, and PCI-Express; 4.1 Interface Fundamentals and Comparison; 4.2 Modeling the Interfaces; 4.3 Architecture Evaluation; 4.4 Conclusions; Acknowledgments; References; Chapter 5. A High-Speed, Multithreaded TCP Offload Engine for 10 Gb/s Ethernet; 5.1 Requirements on TCP Offload Solution; 5.2 Architecture of TOE Solution; 5.3 Performance Analysis; 5.4 Conclusions; Acknowledgments; References Chapter 6. A Hardware Platform for Network Intrusion Detection and Prevention6.1 Design Rationales and Principles; 6.2 Prototype NNIDS on a Network Interface; 6.3 Evaluation and Results; 6.4 Conclusions; References; Chapter 7. Packet Processing on a SIMD Stream Processor; 7.1 Background: Stream Programs and Architectures; 7.2 AES Encryption; 7.3 IPv4 Forwarding; 7.4 Related Work; 7.5 Conclusions and Future Work; Acknowledgments; References; Chapter 8. A Programming Environment for Packet-Processing Systems: Design Considerations; 8.1 Problem Domain 8.2 Shangri-La. A Programming Environment for Packet-Processing Systems 1508.3 Design Details and Challenges; 8.4 Conclusions; References; Chapter 9. RNOS-A Middleware Platform for Low-Cost Packet-Processing Devices; 9.1 Scenario; 9.2 Analysis Model of RNOS; 9.3 Implementation Model of RNOS; 9.4 Measurements and Comparison; 9.5 Conclusions and Outlook; Acknowledgments; References; Chapter 10. On the Feasibility of Using Network Processors for DNA Queries; 10.1 Architecture; 10.2 Implementation Details; 10.3 Results; 10.4 Related Work; 10.5 Conclusions; Acknowledgments; References Chapter 11. Pipeline Task Scheduling on Network Processors11.1 The Pipeline Task Assignment Problem; 11.2 The Greedypipe Algorithm; 11.3 Pipeline Design with Greedypipe; 11.4 A Network Processor Problem; 11.5 Conclusions; Acknowledgments; References; Chapter 12. A Framework for Design Space Exploration of Resource Efficient Network Processing on Multiprocessor SoCs; 12.1 Related Work; 12.2 Modeling Packet-Processing Systems; 12.3 Scheduling; 12.4 Mapping the Application to the System; 12.5 Estimating the Resource Consumption; 12.6 A Design Space Exploration Example; 12.7 Conclusions Acknowledgments |
| Record Nr. | UNINA-9910458468403321 |
| San Francisco, : Morgan Kaufmann, 2005 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Issues and practices [[electronic resource] /] / edited by Patrick Crowley ... [et al.]
| Issues and practices [[electronic resource] /] / edited by Patrick Crowley ... [et al.] |
| Pubbl/distr/stampa | San Francisco, : Morgan Kaufmann, 2005 |
| Descrizione fisica | 1 online resource (335 p.) |
| Disciplina | 621.395 |
| Altri autori (Persone) | CrowleyPatrick |
| Collana | Network processor design |
| Soggetto topico |
Network processors - Design
Application-specific integrated circuits - Design |
| ISBN |
1-280-62622-4
9786610626229 0-08-051250-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Network Processor Design Issues and Practices; Copyright Page; About the Editors; Contents; Preface; Chapter 1. Network Processors: New Horizons; 1.1 Architecture; 1.2 Tools and Techniques; 1.3 Applications; 1.4 Conclusions; References; Chapter 2. Supporting Mixed Real-Time Workloads in Multithreaded Processors with Segmented Instruction Caches; 2.1 Instruction Delivery in NP Data Processors; 2.2 Segmented Instruction Cache; 2.3 Experimental Evaluation; 2.4 Related Work; 2.5 Conclusions and Future Work; References; Chapter 3. Efficient Packet Classification with Digest Caches
3.1 Related Work3.2 Our Approach; 3.3 Evaluation; 3.4 Hardware Overhead; 3.5 Conclusions; Acknowledgments; References; Chapter 4. Towards a Flexible Network Processor Interface for RapidIO, Hypertransport, and PCI-Express; 4.1 Interface Fundamentals and Comparison; 4.2 Modeling the Interfaces; 4.3 Architecture Evaluation; 4.4 Conclusions; Acknowledgments; References; Chapter 5. A High-Speed, Multithreaded TCP Offload Engine for 10 Gb/s Ethernet; 5.1 Requirements on TCP Offload Solution; 5.2 Architecture of TOE Solution; 5.3 Performance Analysis; 5.4 Conclusions; Acknowledgments; References Chapter 6. A Hardware Platform for Network Intrusion Detection and Prevention6.1 Design Rationales and Principles; 6.2 Prototype NNIDS on a Network Interface; 6.3 Evaluation and Results; 6.4 Conclusions; References; Chapter 7. Packet Processing on a SIMD Stream Processor; 7.1 Background: Stream Programs and Architectures; 7.2 AES Encryption; 7.3 IPv4 Forwarding; 7.4 Related Work; 7.5 Conclusions and Future Work; Acknowledgments; References; Chapter 8. A Programming Environment for Packet-Processing Systems: Design Considerations; 8.1 Problem Domain 8.2 Shangri-La. A Programming Environment for Packet-Processing Systems 1508.3 Design Details and Challenges; 8.4 Conclusions; References; Chapter 9. RNOS-A Middleware Platform for Low-Cost Packet-Processing Devices; 9.1 Scenario; 9.2 Analysis Model of RNOS; 9.3 Implementation Model of RNOS; 9.4 Measurements and Comparison; 9.5 Conclusions and Outlook; Acknowledgments; References; Chapter 10. On the Feasibility of Using Network Processors for DNA Queries; 10.1 Architecture; 10.2 Implementation Details; 10.3 Results; 10.4 Related Work; 10.5 Conclusions; Acknowledgments; References Chapter 11. Pipeline Task Scheduling on Network Processors11.1 The Pipeline Task Assignment Problem; 11.2 The Greedypipe Algorithm; 11.3 Pipeline Design with Greedypipe; 11.4 A Network Processor Problem; 11.5 Conclusions; Acknowledgments; References; Chapter 12. A Framework for Design Space Exploration of Resource Efficient Network Processing on Multiprocessor SoCs; 12.1 Related Work; 12.2 Modeling Packet-Processing Systems; 12.3 Scheduling; 12.4 Mapping the Application to the System; 12.5 Estimating the Resource Consumption; 12.6 A Design Space Exploration Example; 12.7 Conclusions Acknowledgments |
| Record Nr. | UNINA-9910784548603321 |
| San Francisco, : Morgan Kaufmann, 2005 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Modern embedded computing : designing connected, pervasive, media-rich systems / / Peter Barry, Patrick Crowley
| Modern embedded computing : designing connected, pervasive, media-rich systems / / Peter Barry, Patrick Crowley |
| Autore | Barry Peter |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Amsterdam, : Elsevier/Morgan Kaufmann, 2012 |
| Descrizione fisica | 1 online resource (545 p.) |
| Disciplina |
004.16
621.39 006.22 |
| Altri autori (Persone) | CrowleyPatrick |
| Soggetto topico | Embedded computer systems |
| ISBN |
9786613434166
9781283434164 1283434164 9780123944078 0123944074 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | pt. 1. Principles of modern mebedded systems -- pt. 2. Embedded systems architecture and operations -- pt. 3. Developing an embedded system. |
| Record Nr. | UNINA-9911006572103321 |
Barry Peter
|
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| Amsterdam, : Elsevier/Morgan Kaufmann, 2012 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Proceedings of the 2nd Acm Sigcomm Workshop on Programmable Routers for Extensible Services of Tomorrow
| Proceedings of the 2nd Acm Sigcomm Workshop on Programmable Routers for Extensible Services of Tomorrow |
| Autore | Crowley Patrick |
| Pubbl/distr/stampa | [Place of publication not identified], : Association for Computing Machinery, 2009 |
| Descrizione fisica | 1 online resource (80 p.;) |
| Collana | ACM Conferences |
| Soggetto topico | Information Technology - Computer Science (Hardware & Networks) |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | PRESTO '09 |
| Record Nr. | UNINA-9910375803503321 |
|
Crowley Patrick
|
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| [Place of publication not identified], : Association for Computing Machinery, 2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||