Digital signal processing and applications with the C6713 and C6416 DSK / / Rulph Chassaing |
Autore | Chassaing Rulph |
Edizione | [1st ed.] |
Pubbl/distr/stampa | Hoboken, N.J., : Wiley-Interscience, c2005 |
Descrizione fisica | 1 online resource (542 p.) |
Disciplina | 621.382/2 |
Collana | Topics in digital signal processing |
Soggetto topico |
Signal processing - Digital techniques
Texas Instruments TMS320 series microprocessors |
ISBN |
9786610275304
0-470-32400-7 0-471-69007-4 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Signal Processing and Applications with the C6713 and C6416 DSK; TOPICS IN DIGITAL SIGNAL PROCESSING; Contents; Preface; List of Examples; Programs/Files on Accompanying CD; 1 DSP Development System; 1.1 Introduction; 1.2 DSK Support Tools; 1.2.1 DSK Board; 1.2.2 TMS320C6713 Digital Signal Processor; 1.3 Code Composer Studio; 1.3.1 CCS Installation and Support; 1.3.2 Useful Types of Files; 1.4 Quick Test of DSK; 1.5 Support Files; 1.6 Programming Examples to Test the DSK Tools; 1.7 Support Programs/Files Considerations; 1.7.1 Initialization/Communication File; 1.7.2 Vector File
1.7.3 Linker Command File1.8 Compiler/Assembler/Linker Shell; 1.8.1 Compiler; 1.8.2 Assembler; 1.8.3 Linker; 1.9 Assignments; References; 2 Input and Output with the DSK; 2.1 Introduction; 2.2 TLV320AIC23 (AIC23) Onboard Stereo Codec for Input and Output; 2.3 Programming Examples Using C Code; 2.4 Assignments; References; 3 Architecture and Instruction Set of the C6x Processor; 3.1 Introduction; 3.2 TMS320C6x Architecture; 3.3 Functional Units; 3.4 Fetch and Execute Packets; 3.5 Pipelining; 3.6 Registers; 3.7 Linear and Circular Addressing Modes; 3.7.1 Indirect Addressing 3.7.2 Circular Addressing3.8 TMS320C6x Instruction Set; 3.8.1 Assembly Code Format; 3.8.2 Types of Instructions; 3.9 Assembler Directives; 3.10 Linear Assembly; 3.11 ASM Statement within C; 3.12 C - Callable Assembly Function; 3.13 Timers; 3.14 Interrupts; 3.14.1 Interrupt Control Registers; 3.14.2 Interrupt Acknowledgment; 3.15 Multichannel Buffered Serial Ports; 3.16 Direct Memory Access; 3.17 Memory Considerations; 3.17.1 Data Allocation; 3.17.2 Data Alignment; 3.17.3 Pragma Directives; 3.17.4 Memory Models; 3.18 Fixed- and Floating-Point Format; 3.18.1 Data Types 3.18.2 Floating-Point Format3.18.3 Division; 3.19 Code Improvement; 3.19.1 Intrinsics; 3.19.2 Trip Directive for Loop Count; 3.19.3 Cross-Paths; 3.19.4 Software Pipelining; 3.20 Constraints; 3.20.1 Memory Constraints; 3.20.2 Cross-Path Constraints; 3.20.3 Load/Store Constraints; 3.20.4 Pipelining Effects with More Than One EP within an FP; 3.21 Programming Examples Using C, Assembly, and Linear Assembly; 3.22 Assignments; References; 4 Finite Impulse Response Filters; 4.1 Introduction to the z-Transform; 4.1.1 Mapping from s-Plane to z-Plane; 4.1.2 Difference Equations; 4.2 Discrete Signals 4.3 FIR Filters4.4 FIR Lattice Structure; 4.5 FIR Implementation Using Fourier Series; 4.6 Window Functions; 4.6.1 Hamming Window; 4.6.2 Hanning Window; 4.6.3 Blackman Window; 4.6.4 Kaiser Window; 4.6.5 Computer-Aided Approximation; 4.7 Programming Examples Using C and ASM Code; 4.8 Assignments; References; 5 Infinite Impulse Response Filters; 5.1 Introduction; 5.2 IIR Filter Structures; 5.2.1 Direct Form I Structure; 5.2.2 Direct Form II Structure; 5.2.3 Direct Form II Transpose; 5.2.4 Cascade Structure; 5.2.5 Parallel Form Structure; 5.2.6 Lattice Structure; 5.3 Bilinear Transformation 5.3.1 BLT Design Procedure |
Record Nr. | UNINA-9910147151403321 |
Chassaing Rulph
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Hoboken, N.J., : Wiley-Interscience, c2005 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital signal processing and applications with the C6713 and C6416 DSK |
Autore | Chassaing Rulph |
Pubbl/distr/stampa | [Place of publication not identified], : John Wiley, 1999 |
Descrizione fisica | 1 online resource (314 pages) |
Disciplina | 621.382/2 |
Collana | Topics in digital signal processing Digital signal processing and applications with the C6713 and C6416 DSK |
Soggetto topico |
Signal processing - Digital techniques
Texas Instruments TMS320 series microprocessors - Programming Electrical & Computer Engineering Engineering & Applied Sciences Telecommunications Signal processing - Experiments - Digital techniques |
ISBN |
1-280-55619-6
1-280-27530-8 9786610556199 0-470-30241-0 0-471-20065-4 0-471-70406-7 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910146074603321 |
Chassaing Rulph
![]() |
||
[Place of publication not identified], : John Wiley, 1999 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
Digital signal processing and applications with the TMS320C6713 and TMS320C6416 DSK / / Rulph Chassaing, Donald Reay |
Autore | Chassaing Rulph |
Edizione | [2nd ed.] |
Pubbl/distr/stampa | Hoboken, New Jersey : , : Wiley-Interscience, , c2008 |
Descrizione fisica | 1 online resource (606 p.) |
Disciplina |
621.382/2
621.3822 |
Altri autori (Persone) |
ReayDonald (Donald S.)
ChassaingRulph |
Collana | Topics in digital signal processing |
Soggetto topico |
Signal processing - Digital techniques
Texas Instruments TMS320 series microprocessors - Programming |
ISBN |
0-470-65241-1
1-118-21034-4 1-281-31764-0 9786611317645 0-470-23814-3 |
Classificazione | ZN 6040 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Signal Processing and Applications with the TMS320C6713 and TMS320C6416 DSK; Contents; Preface; Preface to the First Edition; List of Examples; Programs/Files on Accompanying CD; 1 DSP Development System; 2 Input and Output with the DSK; 3 Architecture and Instruction Set of the C6x Processor; 4 Finite Impulse Response Filters; 5 Infinite Impulse Response Filters; 6 Fast Fourier Transform; 7 Adaptive Filters; 8 Code Optimization; 9 DSP/BIOS and RTDX Using MATLAB, Visual C++, Visual Basic, and LabVIEW; 10 DSP Applications and Student Projects; Appendix A TMS320C6x Instruction Set.
Appendix B Registers for Circular Addressing and InterruptsAppendix C Fixed-Point Considerations; Appendix D MATLAB and Goldwave Support Tools; Appendix E Fast Hartley Transform; Appendix F Goertzel Algorithm; Appendix G TMS320C6416 DSK; Index. |
Record Nr. | UNINA-9910144523203321 |
Chassaing Rulph
![]() |
||
Hoboken, New Jersey : , : Wiley-Interscience, , c2008 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
Digital signal processing and applications with the TMS320C6713 and TMS320C6416 DSK / / Rulph Chassaing, Donald Reay |
Autore | Chassaing Rulph |
Edizione | [2nd ed.] |
Pubbl/distr/stampa | Hoboken, N.J., : Wiley-Interscience, c2008 |
Descrizione fisica | 1 online resource (606 p.) |
Disciplina |
621.382/2
621.3822 |
Altri autori (Persone) |
ReayDonald (Donald S.)
ChassaingRulph |
Collana | Topics in digital signal processing |
Soggetto topico |
Signal processing - Digital techniques
Texas Instruments TMS320 series microprocessors - Programming |
ISBN |
0-470-65241-1
1-118-21034-4 1-281-31764-0 9786611317645 0-470-23814-3 |
Classificazione | ZN 6040 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Signal Processing and Applications with the TMS320C6713 and TMS320C6416 DSK; Contents; Preface; Preface to the First Edition; List of Examples; Programs/Files on Accompanying CD; 1 DSP Development System; 2 Input and Output with the DSK; 3 Architecture and Instruction Set of the C6x Processor; 4 Finite Impulse Response Filters; 5 Infinite Impulse Response Filters; 6 Fast Fourier Transform; 7 Adaptive Filters; 8 Code Optimization; 9 DSP/BIOS and RTDX Using MATLAB, Visual C++, Visual Basic, and LabVIEW; 10 DSP Applications and Student Projects; Appendix A TMS320C6x Instruction Set.
Appendix B Registers for Circular Addressing and InterruptsAppendix C Fixed-Point Considerations; Appendix D MATLAB and Goldwave Support Tools; Appendix E Fast Hartley Transform; Appendix F Goertzel Algorithm; Appendix G TMS320C6416 DSK; Index. |
Record Nr. | UNINA-9910827881803321 |
Chassaing Rulph
![]() |
||
Hoboken, N.J., : Wiley-Interscience, c2008 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
DSP applications using C and the TMS320C6x DSK / / Rulph Chassaing |
Autore | Chassaing Rulph |
Pubbl/distr/stampa | New York : , : John Wiley & Sons, Inc., , [2002] |
Descrizione fisica | 1 online resource (357 pages) |
Disciplina | 621.3822 |
Collana | Topics in digital signal processing |
Soggetto topico |
Signal processing - Digital techniques
Texas Instruments TMS320 series microprocessors C (Computer program language) Tractament del senyal - Tècniques digitals C (Llenguatge de programació) |
ISBN |
9780471221128
1-280-36757-1 9786610367573 0-470-30305-0 0-471-46422-8 0-471-22112-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
DSP Applications Using C and the TMS320C6x DSK; Contents; Preface; List of Examples; Programs/Files on Accompanying Disk; 1 DSP Development System; 1.1 Introduction; 1.2 DSK Support Tools; 1.2.1 DSK Board; 1.2.2 TMS320C6711 Digital Signal Processor; 1.3 Code Composer Studio; 1.3.1 CCS Installation and Support; 1.3.2 Useful Types of Files; 1.4 Programming Examples to Test the DSK Tools; 1.4.1 Quick Test of DSK; 1.4.2 Support Files; 1.4.3 Examples; 1.5 Support Programs/Files Considerations; 1.5.1 Initialization/Communication File; 1.5.2 Vector File; 1.5.3 Linker File
1.6 Compiler/Assembler/Linker Shell1.6.1 Compiler; 1.6.2 Assembler; 1.6.3 Linker; References; 2 Input and Output with the DSK; 2.1 Introduction; 2.2 TLC320AD535 (AD535) Onboard Codec for Input and Output; 2.3 PCM3003 Stereo Codec for Input and Output; 2.4 Programming Examples Using C Code; References; 3 Architecture and Instruction Set of the C6x Processor; 3.1 Introduction; 3.2 TMS320C6x Architecture; 3.3 Functional Units; 3.4 Fetch and Execute Packets; 3.5 Pipelining; 3.6 Registers; 3.7 Linear and Circular Addressing Modes; 3.7.1 Indirect Addressing; 3.7.2 Circular Addressing 3.8 TMS320C6x Instruction Set3.8.1 Assembly Code Format; 3.8.2 Types of Instructions; 3.9 Assembler Directives; 3.10 Linear Assembly; 3.11 ASM Statement within C; 3.12 C-Callable Assembly Function; 3.13 Timers; 3.14 Interrupts; 3.14.1 Interrupt Control Registers; 3.14.2 Selection of XINT0; 3.14.3 Interrupt Acknowledgment; 3.15 Multichannel Buffered Serial Ports; 3.16 Direct Memory Access; 3.17 Memory Considerations; 3.17.1 Data Allocation; 3.17.2 Data Alignment; 3.17.3 Pragma Directives; 3.17.4 Memory Models; 3.18 Fixed- and Floating-Point Format; 3.18.1 Data Types 3.18.2 Floating-Point Format3.18.3 Division; 3.19 Code Improvement; 3.19.1 Intrinsics; 3.19.2 Trip Directive for Loop Count; 3.19.3 Cross-Paths; 3.19.4 Software Pipelining; 3.20 Constraints; 3.20.1 Memory Constraints; 3.20.2 Cross-Paths Constraints; 3.20.3 Load/Store Constraints; 3.20.4 Pipelining Effects with More Than One EP within an FP; 3.21 TMS320C64x Processor; 3.22 Programming Examples Using C, Assembly, and Linear Assembly; References; 4 Finite Impulse Response Filters; 4.1 Introduction to the z-Transform; 4.1.1 Mapping from s-Plane to z-Plane; 4.1.2 Difference Equations 4.2 Discrete Signals4.3 Finite Impulse Response Filters; 4.4 FIR Implementation Using Fourier Series; 4.5 Window Functions; 4.5.1 Hamming Window; 4.5.2 Hanning Window; 4.5.3 Blackman Window; 4.5.4 Kaiser Window; 4.5.5 Computer-Aided Approximation; 4.6 Programming Examples Using C and ASM Code; References; 5 Infinite Impulse Response Filters; 5.1 Introduction; 5.2 IIR Filter Structures; 5.2.1 Direct Form I Structure; 5.2.2 Direct Form II Structure; 5.2.3 Direct Form II Transpose; 5.2.4 Cascade Structure; 5.2.5 Parallel Form Structure; 5.3 Bilinear Transformation 5.3.1 Bilinear Transformation Design Procedure |
Record Nr. | UNINA-9910142515303321 |
Chassaing Rulph
![]() |
||
New York : , : John Wiley & Sons, Inc., , [2002] | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
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