Vai al contenuto principale della pagina
| Autore: |
Furber Steve
|
| Titolo: |
SpiNNaker - a Spiking Neural Network Architecture
|
| Pubblicazione: | Norwell, MA : , : Now Publishers, , 2020 |
| ©2020 | |
| Edizione: | 1st ed. |
| Descrizione fisica: | 1 electronic resource (350 p.) |
| Soggetto topico: | Artificial intelligence |
| Soggetto non controllato: | Neuromorphic computing |
| Brain-inspired computing | |
| Massively-parallel computing | |
| Spiking neural networks | |
| Neuro-robotics | |
| Altri autori: |
BogdanPetruț
|
| Nota di contenuto: | Intro -- Copyright -- Table of Contents -- Preface -- Acknowledgements -- Funding Acknowledgements -- Glossary -- 1 Origins -- 1.1 From Ada to Alan - Early Thoughts on Brains and Computers -- 1.1.1 Ada Lovelace -- 1.1.2 Alan Turing -- 1.2 Reinventing Neural Networks - Early Thoughts on the Machine -- 1.2.1 Mighty ARMs from Little Acorns Grow -- 1.2.2 Realising Our Potential -- 1.2.3 Reinventing Neural Networks -- 1.3 The Architecture Comes Together -- 1.3.1 The State of the Neuromorphic Art -- 1.3.2 What Could We Bring to Neuromorphics? -- 1.3.3 Multicast Packet-switched AER -- 1.3.4 Optimise, Optimise… -- 1.3.5 Flexibility to Cope with Uncertainty -- 1.3.6 Big Memories -- 1.3.7 Ready to Go -- 1.4 A Scalable Hardware Architecture for Neural Simulation -- 1.4.1 Introduction -- 1.4.2 Intellectual Property -- 1.4.3 Market Opportunity -- 1.4.4 System Organisation -- 1.4.5 Node Organisation -- 1.4.6 System Architecture Issues -- 1.4.7 Development Plan -- 1.5 Summary -- 2 The SpiNNaker Chip -- 2.1 Introduction -- 2.2 Architecture -- 2.2.1 An Overview -- 2.2.2 Processor Subsystem -- 2.2.3 Router -- 2.2.4 Interconnection Networks -- 2.2.5 The Rest of the Chip -- 2.3 Multiprocessor Support -- 2.4 Event-Driven Operation -- 2.5 Chip I/O -- 2.6 Monitoring -- 2.7 Chip Details -- 2.8 Design Critique -- 2.9 Summary -- 3 Building SpiNNaker Machines -- 3.1 Putting Chips Together -- 3.1.1 SpiNN-3: Development Platform -- 3.1.2 SpiNN-5: Production Board -- 3.1.3 Nobody is Perfect: Testing and Blacklisting -- 3.2 Putting Boards Together -- 3.2.1 SpiNNaker Topology -- 3.2.2 spiNNlink: High-speed Serial Board-to-Board Interconnect -- 3.3 Putting Everything Together -- 3.3.1 SpiNNaker1M Assembly -- 3.3.2 SpiNNaker1M Interconnect -- 3.3.3 SpiNNaker1M Cabling -- 3.4 Using the Million-Core Machine: Tear it to Pieces -- 3.5 SpiNNaker1M in Action. |
| 4 Stacks of Software Stacks -- 4.1 Introduction -- 4.2 Making Use of the SpiNNaker Architecture -- 4.3 SpiNNaker Core Software -- 4.4 Booting a Million Core Machine -- 4.5 Previous Software Versions -- 4.6 Data Structures -- 4.6.1 SpiNNaker Machines -- 4.6.2 Graphs -- 4.7 The SpiNNTools Tool Chain -- 4.7.1 Setup -- 4.7.2 Graph Creation -- 4.7.3 Graph Execution -- Machine Discovery -- Mapping -- Data Generation -- Loading -- Running -- 4.7.4 Return of Control/Extraction of Results -- 4.7.5 Resuming/Running Again -- 4.7.6 Closing -- 4.7.7 Algorithms and Execution -- 4.7.8 Data Recording and Extraction -- 4.7.9 Live Interaction -- 4.7.10 Dropped Packet Re-Injection -- 4.7.11 Network Traffic Visualisation -- 4.7.12 Performance and Power Measurements -- 4.8 Non-Neural Use Case: Conway's Game of Life -- 4.9 sPyNNaker - Software for Modelling Spiking Neural Networks -- 4.9.1 PyNN -- 4.9.2 sPyNNaker Implementation -- 4.9.3 Preprocessing -- 4.9.4 SpiNNaker Runtime Execution -- Using the Low-Level Libraries -- Time-Driven Neuron Update -- Receiving a Spike -- Activation of the Spike Processing Pipeline -- Synapse processing -- Callback Interaction -- 4.9.5 Neural Modelling -- Software Structure -- Leaky Integrate and Fire Neuron -- Izhikevich Neuron -- 4.9.6 Auxiliary Application Code -- Spike Input Generation -- Simulating Extended Synaptic Delays -- 4.10 Software Engineering for Future Systems -- 4.11 Full Example Code Listing -- 5 Applications - Doing Stuff on the Machine -- 5.1 Robot Art Project -- 5.1.1 Building Brains with Nengo and Some Bits and Pieces -- 5.2 Computer Vision with Spiking Neurons -- 5.2.1 Feature Extraction -- Gabor-like Detection -- Blob Detector -- Motion Detection -- 5.3 SpiNNak-Ear - On-line Sound Processing -- 5.3.1 Motivation for a Neuromorphic Implementation -- 5.3.2 The Early Auditory Pathway. | |
| 5.3.3 Model Algorithm and Distribution -- 5.3.4 Results -- 5.3.5 Future Developments -- 5.4 Basal Ganglia Circuit Abstraction -- 5.5 Constraint Satisfaction -- 5.5.1 Defining the Problem -- 5.5.2 Results -- 5.5.3 Graph Colouring -- 5.5.4 Latin Squares -- 5.5.5 Ising Spin Systems -- 6 From Activations to Spikes -- 6.1 Classical Models -- 6.2 Symbol Card Recognition System with Spiking ConvNets -- 6.2.1 Spiking ConvNet on SpiNNaker -- 6.2.2 Results -- 6.3 Handwritten Digit Recognition with Spiking DBNs -- Spiking DBN on SpiNNaker -- Porting DBN onto SpiNNaker -- Simulating Input Sensory Noise -- Limited Weight Precision -- 6.3.1 Results -- 6.4 Spiking Deep Neural Networks -- 6.4.1 Related Work -- 6.4.2 Siegert: Modelling the Response Function -- Biological Background -- Mismatch of the Siegert Function to Practice -- Noisy Softplus (NSP) -- 6.4.3 Generalised Off-line SNN Training -- Mapping NSP to Concrete Physical Units -- Parametric Activation Functions (PAFs) -- Training Method -- Fine Tuning -- 6.4.4 Results -- Experiment Description -- Individual Neuronal Activity -- Learning Performance -- Recognition Performance -- Power Consumption -- 6.4.5 Summary -- 7 Learning in Neural Networks -- 7.1 Sizing Up the (Biological) Competition -- 7.2 Spike-Timing-Dependent Plasticity -- 7.2.1 Experimental Evidence for Spike-Timing-Dependent Plasticity -- 7.2.2 Related Work -- 7.2.3 Implementation -- 7.2.4 Inhibitory Plasticity in Cortical Networks -- 7.2.5 The Effect of Weight Dependencies -- 7.3 Voltage-Dependent Weight Update -- 7.3.1 Results -- 7.4 Neuromodulated STDP -- 7.4.1 Eligibility Traces/Synapse Tagging -- 7.4.2 Credit Assignment -- 7.5 Structural Plasticity -- 7.5.1 Topographic Map Formation -- 7.5.2 Stable Mappings Arise from Lateral Inhibition -- 7.5.3 MNIST Classification in the Absence of Weight Changes. | |
| 7.5.4 Visualisation, Visualisation, Visualisation -- 7.5.5 Rewiring for Motion Detection -- 7.6 Neuroevolution -- 7.6.1 Pac-Man on SpiNNaker -- 7.6.2 Further Exploration of NEAT -- 7.6.3 An Evolutionary Optimisation Framework for SpiNNaker -- 7.6.4 Methods -- 7.6.5 Results -- 7.6.6 Future Work -- Different EAs -- Machine Learning -- Learning-to-Learn -- Impact on Computational Neuroscience -- 8 Creating the Future -- 8.1 Survey of Currently Available Accelerators -- 8.2 SpiNNaker2 -- 8.2.1 Lessons from SpiNNaker1 -- Strengths -- Weaknesses -- 8.2.2 Scaling Performance and Efficiency -- 8.3 SpiNNaker2 Chip Architecture -- 8.4 SpiNNaker2 Packet Router -- 8.5 The Processing Element (PE) -- 8.5.1 PE Components -- Communications Controller -- Random Number Accelerator -- Rounding Accelerator -- Elementary Function (exp, log) Accelerator -- Machine Learning (ML) Accelerator -- 8.5.2 PE Implementation Strategy and Power Management -- 8.6 Summary -- References -- Index -- About the Editors -- Contributing Authors. | |
| Sommario/riassunto: | 20 years in conception and 15 in construction, the SpiNNaker project has delivered the world’s largest neuromorphic computing platform incorporating over a million ARM mobile phone processors and capable of modelling spiking neural networks of the scale of a mouse brain in biological real time. This machine, hosted at the University of Manchester in the UK, is freely available under the auspices of the EU Flagship Human Brain Project. This book tells the story of the origins of the machine, its development and its deployment, and the immense software development effort that has gone into making it openly available and accessible to researchers and students the world over. It also presents exemplar applications from ‘Talk’, a SpiNNaker-controlled robotic exhibit at the Manchester Art Gallery as part of ‘The Imitation Game’, a set of works commissioned in 2016 in honour of Alan Turing, through to a way to solve hard computing problems using stochastic neural networks. The book concludes with a look to the future, and the SpiNNaker-2 machine which is yet to come. |
| Titolo autorizzato: | SpiNNaker - a Spiking Neural Network Architecture ![]() |
| Formato: | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910476755903321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |