Info
- Utilizzare la checkbox di selezione a fianco di ciascun documento per attivare le funzionalità di stampa, invio email, download nei formati disponibili del (i) record.
Field-Programmable Technology (FPT), 2013 International Conference on / / edited by Hideharu Amano, Yajun Ha, Yoshiki Yamaguchi
| Field-Programmable Technology (FPT), 2013 International Conference on / / edited by Hideharu Amano, Yajun Ha, Yoshiki Yamaguchi |
| Pubbl/distr/stampa | Piscataway, N.J. : , : IEEE, , 2013 |
| Descrizione fisica | 1 online resource (510 pages) |
| Disciplina | 621.38195 |
| Soggetto topico |
Computer engineering
Field programmable gate arrays |
| ISBN | 1-4799-2198-X |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
2013 International Conference on Field-Programmable Technology
2013 International Conference on Field-Programmable Technology (FPT) Field-Programmable Technology |
| Record Nr. | UNISA-996280992403316 |
| Piscataway, N.J. : , : IEEE, , 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Field-Programmable Technology (FPT), 2013 International Conference on / / edited by Hideharu Amano, Yajun Ha, Yoshiki Yamaguchi
| Field-Programmable Technology (FPT), 2013 International Conference on / / edited by Hideharu Amano, Yajun Ha, Yoshiki Yamaguchi |
| Pubbl/distr/stampa | Piscataway, N.J. : , : IEEE, , 2013 |
| Descrizione fisica | 1 online resource (510 pages) |
| Disciplina | 621.38195 |
| Soggetto topico |
Computer engineering
Field programmable gate arrays |
| ISBN | 1-4799-2198-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
2013 International Conference on Field-Programmable Technology
2013 International Conference on Field-Programmable Technology (FPT) Field-Programmable Technology |
| Record Nr. | UNINA-9910132402603321 |
| Piscataway, N.J. : , : IEEE, , 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High Performance Computing [[electronic resource] ] : 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings / / edited by Alex Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso
| High Performance Computing [[electronic resource] ] : 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings / / edited by Alex Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso |
| Edizione | [1st ed. 2003.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 |
| Descrizione fisica | 1 online resource (XV, 573 p.) |
| Disciplina | 004.1/1 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Microprocessors
Computer programming Software engineering Algorithms Computer science—Mathematics Computer simulation Processor Architectures Programming Techniques Software Engineering Algorithm Analysis and Problem Complexity Mathematics of Computing Simulation and Modeling |
| ISBN | 3-540-39707-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Papers -- High Performance Computing Trends and Self Adapting Numerical Software -- Kilo-instruction Processors -- CARE: Overview of an Adaptive Multithreaded Architecture -- Numerical Simulator III – A Terascale SMP-Cluster System for Aerospace Science and Engineering: Its Design and the Performance Issue -- Award Papers -- Code and Data Transformations for Improving Shared Cache Performance on SMT Processors -- Improving Memory Latency Aware Fetch Policies for SMT Processors -- Architecture -- Tolerating Branch Predictor Latency on SMT -- A Simple Low-Energy Instruction Wakeup Mechanism -- Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes -- Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structures -- Software -- FIBER: A Generalized Framework for Auto-tuning Software -- Evaluating Heuristic Scheduling Algorithms for High Performance Parallel Processing -- Pursuing Laziness for Efficient Implementation of Modern Multithreaded Languages -- SPEC HPG Benchmarks for Large Systems -- Applications -- Distribution-Insensitive Parallel External Sorting on PC Clusters -- Distributed Genetic Algorithm for Inference of Biological Scale-Free Network Structure -- Is Cook’s Theorem Correct for DNA-Based Computing? -- LES of Unstable Combustion in a Gas Turbine Combustor -- ITBL -- Grid Computing Supporting System on ITBL Project -- A Visual Resource Integration Environment for Distributed Applications on the ITBL System -- Development of Remote Visualization and Collaborative Visualization System in ITBL Grid Environment -- Performance of Network Intrusion Detection Cluster System -- Constructing a Virtual Laboratory on the Internet: The ITBL Portal -- Evaluation of High-Speed VPN Using CFD Benchmark -- The Development of the UPACS CFD Environment -- Virtual Experiment Platform for Materials Design -- Ab Initio Study of Hydrogen Hydrate Clathrates for Hydrogen Storage within the ITBL Environment -- Short Papers -- RI2N – Interconnection Network System for Clusters with Wide-Bandwidth and Fault-Tolerancy Based on Multiple Links -- A Bypass-Sensitive Blocking-Preventing Scheduling Technique for Mesh-Connected Multicomputers -- Broadcast in a MANET Based on the Beneficial Area -- An Optimal Method for Coordinated En-route Web Object Caching -- An Improved Algorithm of Multicast Topology Inference from End-to-End Measurements -- Chordal Topologies for Interconnection Networks -- Distributed Location of Shared Resources and Its Application to the Load Sharing Problem in Heterogeneous Distributed Systems -- Design and Implementation of a Parallel Programming Environment Based on Distributed Shared Arrays -- Design and Implementation of Parallel Modified PrefixSpan Method -- Parallel LU-decomposition on Pentium Streaming SIMD Extensions -- Parallel Matrix Multiplication and LU Factorization on Ethernet-Based Clusters -- Online Remote Trace Analysis of Parallel Applications on High-Performance Clusters -- Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor -- The GSN Library and FORTRAN Level I/O Benchmarks on the NS-III HPC System -- Large Scale Structures of Turbulent Shear Flow via DNS -- Molecular Dynamics Simulation of Prion Protein by Large Scale Cluster Computing -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI 2003) -- OpenMP/MPI Hybrid vs. Flat MPI on the Earth Simulator: Parallel Iterative Solvers for Finite Element Method -- Performance Evaluation of Low Level Multithreaded BLAS Kernels on Intel Processor Based cc-NUMA Systems -- Support of Multidimensional Parallelism in the OpenMP Programming Model -- On the Implementation of OpenMP 2.0 Extensions in the Fujitsu PRIMEPOWER Compiler -- Improve OpenMP Performance by Extending BARRIER and REDUCTION Constructs -- OpenMP for Adaptive Master-Slave Message Passing Applications -- OpenGR: A Directive-Based Grid Programming Environment. |
| Record Nr. | UNISA-996466066903316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
High Performance Computing : 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings / / edited by Alex Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso
| High Performance Computing : 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings / / edited by Alex Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso |
| Edizione | [1st ed. 2003.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 |
| Descrizione fisica | 1 online resource (XV, 573 p.) |
| Disciplina | 004.1/1 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Microprocessors
Computer programming Software engineering Algorithms Computer science—Mathematics Computer simulation Processor Architectures Programming Techniques Software Engineering Algorithm Analysis and Problem Complexity Mathematics of Computing Simulation and Modeling |
| ISBN | 3-540-39707-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Papers -- High Performance Computing Trends and Self Adapting Numerical Software -- Kilo-instruction Processors -- CARE: Overview of an Adaptive Multithreaded Architecture -- Numerical Simulator III – A Terascale SMP-Cluster System for Aerospace Science and Engineering: Its Design and the Performance Issue -- Award Papers -- Code and Data Transformations for Improving Shared Cache Performance on SMT Processors -- Improving Memory Latency Aware Fetch Policies for SMT Processors -- Architecture -- Tolerating Branch Predictor Latency on SMT -- A Simple Low-Energy Instruction Wakeup Mechanism -- Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes -- Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structures -- Software -- FIBER: A Generalized Framework for Auto-tuning Software -- Evaluating Heuristic Scheduling Algorithms for High Performance Parallel Processing -- Pursuing Laziness for Efficient Implementation of Modern Multithreaded Languages -- SPEC HPG Benchmarks for Large Systems -- Applications -- Distribution-Insensitive Parallel External Sorting on PC Clusters -- Distributed Genetic Algorithm for Inference of Biological Scale-Free Network Structure -- Is Cook’s Theorem Correct for DNA-Based Computing? -- LES of Unstable Combustion in a Gas Turbine Combustor -- ITBL -- Grid Computing Supporting System on ITBL Project -- A Visual Resource Integration Environment for Distributed Applications on the ITBL System -- Development of Remote Visualization and Collaborative Visualization System in ITBL Grid Environment -- Performance of Network Intrusion Detection Cluster System -- Constructing a Virtual Laboratory on the Internet: The ITBL Portal -- Evaluation of High-Speed VPN Using CFD Benchmark -- The Development of the UPACS CFD Environment -- Virtual Experiment Platform for Materials Design -- Ab Initio Study of Hydrogen Hydrate Clathrates for Hydrogen Storage within the ITBL Environment -- Short Papers -- RI2N – Interconnection Network System for Clusters with Wide-Bandwidth and Fault-Tolerancy Based on Multiple Links -- A Bypass-Sensitive Blocking-Preventing Scheduling Technique for Mesh-Connected Multicomputers -- Broadcast in a MANET Based on the Beneficial Area -- An Optimal Method for Coordinated En-route Web Object Caching -- An Improved Algorithm of Multicast Topology Inference from End-to-End Measurements -- Chordal Topologies for Interconnection Networks -- Distributed Location of Shared Resources and Its Application to the Load Sharing Problem in Heterogeneous Distributed Systems -- Design and Implementation of a Parallel Programming Environment Based on Distributed Shared Arrays -- Design and Implementation of Parallel Modified PrefixSpan Method -- Parallel LU-decomposition on Pentium Streaming SIMD Extensions -- Parallel Matrix Multiplication and LU Factorization on Ethernet-Based Clusters -- Online Remote Trace Analysis of Parallel Applications on High-Performance Clusters -- Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor -- The GSN Library and FORTRAN Level I/O Benchmarks on the NS-III HPC System -- Large Scale Structures of Turbulent Shear Flow via DNS -- Molecular Dynamics Simulation of Prion Protein by Large Scale Cluster Computing -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI 2003) -- OpenMP/MPI Hybrid vs. Flat MPI on the Earth Simulator: Parallel Iterative Solvers for Finite Element Method -- Performance Evaluation of Low Level Multithreaded BLAS Kernels on Intel Processor Based cc-NUMA Systems -- Support of Multidimensional Parallelism in the OpenMP Programming Model -- On the Implementation of OpenMP 2.0 Extensions in the Fujitsu PRIMEPOWER Compiler -- Improve OpenMP Performance by Extending BARRIER and REDUCTION Constructs -- OpenMP for Adaptive Master-Slave Message Passing Applications -- OpenGR: A Directive-Based Grid Programming Environment. |
| Record Nr. | UNINA-9910768454903321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Principles and Structures of FPGAs / / edited by Hideharu Amano
| Principles and Structures of FPGAs / / edited by Hideharu Amano |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Singapore : , : Springer Singapore : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (IX, 231 p. 176 illus., 34 illus. in color.) |
| Disciplina | 621.395 |
| Soggetto topico |
Logic design
Electronic circuits Electronics Microelectronics Logic Design Circuits and Systems Electronic Circuits and Devices Electronics and Microelectronics, Instrumentation |
| ISBN |
981-13-0824-1
9789811308246 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1: Basic knowledge to understand FPGAs -- Chapter 2: What is an FPGA? -- Chapter 3: FPGA Structure -- Chapter 4: Design flow and design tools -- Chapter 5: Design Methodology -- Chapter 6: Hardware Algorithms -- Chapter 7: Programmable Logic Devices (PLDs) in Practical Applications -- Chapter 8: Advanced Devices and Architectures. |
| Record Nr. | UNINA-9910349472803321 |
| Singapore : , : Springer Singapore : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Reconfigurable Computing: Architectures, Tools and Applications [[electronic resource] ] : 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings / / edited by Phaophak Sirisuk, Fearghal Morgan, Tarek El-Ghazawi, Hideharu Amano
| Reconfigurable Computing: Architectures, Tools and Applications [[electronic resource] ] : 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings / / edited by Phaophak Sirisuk, Fearghal Morgan, Tarek El-Ghazawi, Hideharu Amano |
| Edizione | [1st ed. 2010.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2010 |
| Descrizione fisica | 1 online resource (XIV, 450 p. 217 illus.) |
| Disciplina | 004.6 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Software engineering Algorithms Computer science Computer programming Computer Communication Networks Software Engineering Theory of Computation Programming Techniques |
| ISBN |
1-280-38598-7
9786613563903 3-642-12133-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Keynotes (Abstracts) -- High-Performance Energy-Efficient Reconfigurable Accelerators/Co-processors for Tera-Scale Multi-core Microprocessors -- Process Variability and Degradation: New Frontier for Reconfigurable -- Towards Analytical Methods for FPGA Architecture Investigation -- Session 1: Architectures 1 -- Generic Systolic Array for Run-Time Scalable Cores -- Virtualization within a Parallel Array of Homogeneous Processing Units -- Feasibility Study of a Self-healing Hardware Platform -- Session 2: Applications 1 -- Application-Specific Signatures for Transactional Memory in Soft Processors -- Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systems -- Parametric Encryption Hardware Design -- A Reconfigurable Implementation of the Tate Pairing Computation over GF(2 m ) -- Session 3: Architectures 2 -- Application Specific FPGA Using Heterogeneous Logic Blocks -- Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip -- A Dedicated Reconfigurable Architecture for Finite State Machines -- MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment -- Session 4: Applications 2 -- An FPGA Accelerator for Hash Tree Generation in the Merkle Signature Scheme -- A Fused Hybrid Floating-Point and Fixed-Point Dot-Product for FPGAs -- Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods -- Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA -- Session 5: Design Tools 1 -- 3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices -- TROUTE: A Reconfigurability-Aware FPGA Router -- Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing -- Routing-Aware Application Mapping Considering Steiner Points for Coarse-Grained Reconfigurable Architecture -- Session 6: Design Tools 2 -- Design Automation for Reconfigurable Interconnection Networks -- A Framework for Enabling Fault Tolerance in Reconfigurable Architectures -- QUAD – A Memory Access Pattern Analyser -- Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations -- Session 7: Applications 3 -- Reconfigurable Computing and Task Scheduling for Active Storage Service Processing -- A Reconfigurable Disparity Engine for Stereovision in Advanced Driver Assistance Systems -- A Modified Merging Approach for Datapath Configuration Time Reduction -- Posters -- Reconfigurable Computing Education in Computer Science -- Hardware Implementation of the Orbital Function for Quantum Chemistry Calculations -- Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing -- Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures -- A GMM-Based Speaker Identification System on FPGA -- An FPGA-Based Real-Time Event Sampler -- A Performance Evaluation of CUBE: One-Dimensional 512 FPGA Cluster -- An Analysis of Delay Based PUF Implementations on FPGA -- Comparison of Bit Serial Computation with Bit Parallel Computation for Reconfigurable Processor -- FPGA Implementation of QR Decomposition Using MGS Algorithm -- Memory-Centric Communication Architecture for Reconfigurable Computing -- Integrated Design Environment for Reconfigurable HPC -- Architecture-Aware Custom Instruction Generation for Reconfigurable Processors -- Cost and Performance Evaluation of a Noise Filter for Partitioning in Co-design Methodologies -- Towards a Tighter Integration of Generated and Custom-Made Hardware -- Pipelined Microprocessors Optimization and Debugging. |
| Record Nr. | UNISA-996465282303316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||