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SoC physical design : a comprehensive guide / / Veena S. Chakravarthi and Shivananda R. Koteshwar
| SoC physical design : a comprehensive guide / / Veena S. Chakravarthi and Shivananda R. Koteshwar |
| Autore | Chakravarthi Veena S. |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer International Publishing, , [2022] |
| Descrizione fisica | 1 online resource (173 pages) |
| Disciplina | 004.16 |
| Soggetto topico |
Systems on a chip
Systems on a chip - Testing |
| ISBN | 3-030-98112-6 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910574861203321 |
Chakravarthi Veena S.
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| Cham, Switzerland : , : Springer International Publishing, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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SOCC : 2014 27th IEEE International System-on-Chip Conference : 2-5 September 2014
| SOCC : 2014 27th IEEE International System-on-Chip Conference : 2-5 September 2014 |
| Pubbl/distr/stampa | New York : , : IEEE, , 2014 |
| Descrizione fisica | 1 online resource (102 pages) |
| Soggetto topico |
Electronic digital computers - Circuits
Systems on a chip Integrated circuits - Very large scale integration - Design and construction |
| ISBN | 1-4799-3378-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996279799203316 |
| New York : , : IEEE, , 2014 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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SOCC : 2014 27th IEEE International System-on-Chip Conference : 2-5 September 2014
| SOCC : 2014 27th IEEE International System-on-Chip Conference : 2-5 September 2014 |
| Pubbl/distr/stampa | New York : , : IEEE, , 2014 |
| Descrizione fisica | 1 online resource (102 pages) |
| Soggetto topico |
Electronic digital computers - Circuits
Systems on a chip Integrated circuits - Very large scale integration - Design and construction |
| ISBN | 1-4799-3378-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910135616503321 |
| New York : , : IEEE, , 2014 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Software defined chips : Volume II / / Leibo Liu [and three others]
| Software defined chips : Volume II / / Leibo Liu [and three others] |
| Autore | Liu Leibo |
| Pubbl/distr/stampa | Singapore : , : Springer, , [2023] |
| Descrizione fisica | 1 online resource (330 pages) |
| Disciplina | 621.3815 |
| Soggetto topico |
Integrated circuits
Systems on a chip |
| ISBN | 981-19-7636-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910631082303321 |
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Liu Leibo
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| Singapore : , : Springer, , [2023] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Software defined chips . Volume I / / Shaojun Wei [and three others]
| Software defined chips . Volume I / / Shaojun Wei [and three others] |
| Autore | Wei Shaojun |
| Pubbl/distr/stampa | Gateway East, Singapore : , : Springer, , [2022] |
| Descrizione fisica | 1 online resource (316 pages) |
| Disciplina | 621.38173 |
| Soggetto topico |
Integrated circuits
Systems on a chip |
| ISBN | 981-19-6994-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910619274403321 |
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Wei Shaojun
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| Gateway East, Singapore : , : Springer, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Software defined chips . Volume I / / Shaojun Wei [and three others]
| Software defined chips . Volume I / / Shaojun Wei [and three others] |
| Autore | Wei Shaojun |
| Pubbl/distr/stampa | Gateway East, Singapore : , : Springer, , [2022] |
| Descrizione fisica | 1 online resource (316 pages) |
| Disciplina | 621.38173 |
| Soggetto topico |
Integrated circuits
Systems on a chip |
| ISBN | 981-19-6994-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996495561403316 |
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Wei Shaojun
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| Gateway East, Singapore : , : Springer, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann
| System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann |
| Autore | Hoffmann Kurt <1951-> |
| Pubbl/distr/stampa | Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 |
| Descrizione fisica | 1 online resource (512 p.) |
| Disciplina | 621.3815 |
| Soggetto topico |
Systems on a chip
Integrated circuits |
| ISBN |
1-280-27506-5
9786610275069 0-470-02069-5 0-470-02071-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
System Integration; Contents; Preface; Acknowledgments; Physical Constants and Conversion Factors; Symbols; 1 Semiconductor Physics; 1.1 Band Theory of Solids; 1.2 Doped Semiconductor; 1.3 Semiconductor in Equilibrium; 1.3.1 Fermi-Dirac Distribution Function; 1.3.2 Carrier Concentration at Equilibrium; 1.3.3 Density Product at Equilibrium; 1.3.4 Relationship between Energy, Voltage, and Electrical Field; 1.4 Charge Transport; 1.4.1 Drift Velocity; 1.4.2 Drift Current; 1.4.3 Diffusion Current; 1.4.4 Continuity Equation; 1.5 Non-Equilibrium Conditions; Problems; References; Further Reading
2 pn-Junction2.1 Inhomogeneously Doped n-type Semiconductor; 2.2 pn-Junction at Equilibrium; 2.3 Biased pn-Junction; 2.3.1 Density Product under Non-Equilibrium Conditions; 2.3.2 Current-Voltage Relationship; 2.3.3 Deviation from the Current-Voltage Relationship; 2.3.4 Voltage Reference Point; 2.4 Capacitance Characteristic; 2.4.1 Depletion Capacitance; 2.4.2 Diffusion Capacitance; 2.5 Switching Characteristic; 2.6 Junction Breakdown; 2.7 Modeling the pn-Junction; 2.7.1 Diode Model for CAD Applications; 2.7.2 Diode Model for Static Calculations; 2.7.3 Diode Model for Small-Signal Calculations ProblemsReferences; 3 Bipolar Transistor; 3.1 Bipolar Technologies; 3.2 Transistor Operation; 3.2.1 Current-Voltage Relationship; 3.2.2 Transistor under Reverse Biased Condition; 3.2.3 Voltage Saturation; 3.2.4 Temperature Behavior; 3.2.5 Breakdown Behavior; 3.3 Second-Order Effects; 3.3.1 High Current Effects; 3.3.2 Base-Width Modulation; 3.3.3 Current Crowding; 3.4 Alternative Transistor Structures; 3.5 Modeling the Bipolar Transistor; 3.5.1 Transistor Model for CAD Applications; 3.5.2 Transistor Model for Static Calculations; 3.5.3 Transistor Model for Small-Signal Calculations 3.5.4 Transit Time DeterminationProblems; References; Further Reading; 4 MOS Transistor; 4.1 CMOS Technology; 4.2 The MOS Structure; 4.2.1 Characteristic of the MOS Structure; 4.2.2 Capacitance Behavior of the MOS Structure; 4.2.3 Flat-Band Voltage; 4.3 Equations of the MOS Structure; 4.3.1 Charge Equations of the MOS Structure; 4.3.2 Surface Voltage at Strong Inversion; 4.3.3 Threshold Voltage and Body Effect; 4.4 MOS Transistor; 4.4.1 Current-Voltage Characteristic at Strong Inversion; 4.4.2 Improved Transistor Equation; 4.4.3 Current-Voltage Characteristic at Weak Inversion 4.4.4 Temperature Behavior4.5 Second-Order Effects; 4.5.1 Mobility Degradation; 4.5.2 Channel Length Modulation; 4.5.3 Short Channel Effects; 4.5.4 Hot Electrons; 4.5.5 Gate-Induced Drain Leakage; 4.5.6 Breakdown Behavior; 4.5.7 Latch-up Effect; 4.6 Power Devices; 4.7 Modeling of the MOS Transistor; 4.7.1 Transistor Model for CAD Applications; 4.7.2 Transistor Model for Static and Dynamic Calculations; 4.7.3 Transistor Model for Small-Signal Calculations; Problems; Appendix A Current-Voltage Equation of the MOS Transistor under Weak Inversion Condition; References; Further Reading 5 Basic Digital CMOS Circuits |
| Record Nr. | UNINA-9910145753103321 |
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Hoffmann Kurt <1951->
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| Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann
| System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann |
| Autore | Hoffmann Kurt <1951-> |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 |
| Descrizione fisica | 1 online resource (512 p.) |
| Disciplina | 621.3815 |
| Soggetto topico |
Systems on a chip
Integrated circuits |
| ISBN |
1-280-27506-5
9786610275069 0-470-02069-5 0-470-02071-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
System Integration; Contents; Preface; Acknowledgments; Physical Constants and Conversion Factors; Symbols; 1 Semiconductor Physics; 1.1 Band Theory of Solids; 1.2 Doped Semiconductor; 1.3 Semiconductor in Equilibrium; 1.3.1 Fermi-Dirac Distribution Function; 1.3.2 Carrier Concentration at Equilibrium; 1.3.3 Density Product at Equilibrium; 1.3.4 Relationship between Energy, Voltage, and Electrical Field; 1.4 Charge Transport; 1.4.1 Drift Velocity; 1.4.2 Drift Current; 1.4.3 Diffusion Current; 1.4.4 Continuity Equation; 1.5 Non-Equilibrium Conditions; Problems; References; Further Reading
2 pn-Junction2.1 Inhomogeneously Doped n-type Semiconductor; 2.2 pn-Junction at Equilibrium; 2.3 Biased pn-Junction; 2.3.1 Density Product under Non-Equilibrium Conditions; 2.3.2 Current-Voltage Relationship; 2.3.3 Deviation from the Current-Voltage Relationship; 2.3.4 Voltage Reference Point; 2.4 Capacitance Characteristic; 2.4.1 Depletion Capacitance; 2.4.2 Diffusion Capacitance; 2.5 Switching Characteristic; 2.6 Junction Breakdown; 2.7 Modeling the pn-Junction; 2.7.1 Diode Model for CAD Applications; 2.7.2 Diode Model for Static Calculations; 2.7.3 Diode Model for Small-Signal Calculations ProblemsReferences; 3 Bipolar Transistor; 3.1 Bipolar Technologies; 3.2 Transistor Operation; 3.2.1 Current-Voltage Relationship; 3.2.2 Transistor under Reverse Biased Condition; 3.2.3 Voltage Saturation; 3.2.4 Temperature Behavior; 3.2.5 Breakdown Behavior; 3.3 Second-Order Effects; 3.3.1 High Current Effects; 3.3.2 Base-Width Modulation; 3.3.3 Current Crowding; 3.4 Alternative Transistor Structures; 3.5 Modeling the Bipolar Transistor; 3.5.1 Transistor Model for CAD Applications; 3.5.2 Transistor Model for Static Calculations; 3.5.3 Transistor Model for Small-Signal Calculations 3.5.4 Transit Time DeterminationProblems; References; Further Reading; 4 MOS Transistor; 4.1 CMOS Technology; 4.2 The MOS Structure; 4.2.1 Characteristic of the MOS Structure; 4.2.2 Capacitance Behavior of the MOS Structure; 4.2.3 Flat-Band Voltage; 4.3 Equations of the MOS Structure; 4.3.1 Charge Equations of the MOS Structure; 4.3.2 Surface Voltage at Strong Inversion; 4.3.3 Threshold Voltage and Body Effect; 4.4 MOS Transistor; 4.4.1 Current-Voltage Characteristic at Strong Inversion; 4.4.2 Improved Transistor Equation; 4.4.3 Current-Voltage Characteristic at Weak Inversion 4.4.4 Temperature Behavior4.5 Second-Order Effects; 4.5.1 Mobility Degradation; 4.5.2 Channel Length Modulation; 4.5.3 Short Channel Effects; 4.5.4 Hot Electrons; 4.5.5 Gate-Induced Drain Leakage; 4.5.6 Breakdown Behavior; 4.5.7 Latch-up Effect; 4.6 Power Devices; 4.7 Modeling of the MOS Transistor; 4.7.1 Transistor Model for CAD Applications; 4.7.2 Transistor Model for Static and Dynamic Calculations; 4.7.3 Transistor Model for Small-Signal Calculations; Problems; Appendix A Current-Voltage Equation of the MOS Transistor under Weak Inversion Condition; References; Further Reading 5 Basic Digital CMOS Circuits |
| Record Nr. | UNINA-9910819126403321 |
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Hoffmann Kurt <1951->
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| Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann
| System integration [[electronic resource] ] : from transistor design to large scale integrated circuits / / Kurt Hoffmann |
| Autore | Hoffmann Kurt <1951-> |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 |
| Descrizione fisica | 1 online resource (512 p.) |
| Disciplina | 621.3815 |
| Soggetto topico |
Systems on a chip
Integrated circuits |
| ISBN |
1-280-27506-5
9786610275069 0-470-02069-5 0-470-02071-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
System Integration; Contents; Preface; Acknowledgments; Physical Constants and Conversion Factors; Symbols; 1 Semiconductor Physics; 1.1 Band Theory of Solids; 1.2 Doped Semiconductor; 1.3 Semiconductor in Equilibrium; 1.3.1 Fermi-Dirac Distribution Function; 1.3.2 Carrier Concentration at Equilibrium; 1.3.3 Density Product at Equilibrium; 1.3.4 Relationship between Energy, Voltage, and Electrical Field; 1.4 Charge Transport; 1.4.1 Drift Velocity; 1.4.2 Drift Current; 1.4.3 Diffusion Current; 1.4.4 Continuity Equation; 1.5 Non-Equilibrium Conditions; Problems; References; Further Reading
2 pn-Junction2.1 Inhomogeneously Doped n-type Semiconductor; 2.2 pn-Junction at Equilibrium; 2.3 Biased pn-Junction; 2.3.1 Density Product under Non-Equilibrium Conditions; 2.3.2 Current-Voltage Relationship; 2.3.3 Deviation from the Current-Voltage Relationship; 2.3.4 Voltage Reference Point; 2.4 Capacitance Characteristic; 2.4.1 Depletion Capacitance; 2.4.2 Diffusion Capacitance; 2.5 Switching Characteristic; 2.6 Junction Breakdown; 2.7 Modeling the pn-Junction; 2.7.1 Diode Model for CAD Applications; 2.7.2 Diode Model for Static Calculations; 2.7.3 Diode Model for Small-Signal Calculations ProblemsReferences; 3 Bipolar Transistor; 3.1 Bipolar Technologies; 3.2 Transistor Operation; 3.2.1 Current-Voltage Relationship; 3.2.2 Transistor under Reverse Biased Condition; 3.2.3 Voltage Saturation; 3.2.4 Temperature Behavior; 3.2.5 Breakdown Behavior; 3.3 Second-Order Effects; 3.3.1 High Current Effects; 3.3.2 Base-Width Modulation; 3.3.3 Current Crowding; 3.4 Alternative Transistor Structures; 3.5 Modeling the Bipolar Transistor; 3.5.1 Transistor Model for CAD Applications; 3.5.2 Transistor Model for Static Calculations; 3.5.3 Transistor Model for Small-Signal Calculations 3.5.4 Transit Time DeterminationProblems; References; Further Reading; 4 MOS Transistor; 4.1 CMOS Technology; 4.2 The MOS Structure; 4.2.1 Characteristic of the MOS Structure; 4.2.2 Capacitance Behavior of the MOS Structure; 4.2.3 Flat-Band Voltage; 4.3 Equations of the MOS Structure; 4.3.1 Charge Equations of the MOS Structure; 4.3.2 Surface Voltage at Strong Inversion; 4.3.3 Threshold Voltage and Body Effect; 4.4 MOS Transistor; 4.4.1 Current-Voltage Characteristic at Strong Inversion; 4.4.2 Improved Transistor Equation; 4.4.3 Current-Voltage Characteristic at Weak Inversion 4.4.4 Temperature Behavior4.5 Second-Order Effects; 4.5.1 Mobility Degradation; 4.5.2 Channel Length Modulation; 4.5.3 Short Channel Effects; 4.5.4 Hot Electrons; 4.5.5 Gate-Induced Drain Leakage; 4.5.6 Breakdown Behavior; 4.5.7 Latch-up Effect; 4.6 Power Devices; 4.7 Modeling of the MOS Transistor; 4.7.1 Transistor Model for CAD Applications; 4.7.2 Transistor Model for Static and Dynamic Calculations; 4.7.3 Transistor Model for Small-Signal Calculations; Problems; Appendix A Current-Voltage Equation of the MOS Transistor under Weak Inversion Condition; References; Further Reading 5 Basic Digital CMOS Circuits |
| Record Nr. | UNISA-996213668403316 |
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Hoffmann Kurt <1951->
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| Chichester, West Sussex, England ; ; Hoboken, NJ, : John Wiley & Sons, c2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
System-on-Chip, 2007 International Symposium on / / Institute of Electrical and Electronics Engineers
| System-on-Chip, 2007 International Symposium on / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | Piscataway, N.J. : , : IEEE, , 2007 |
| Descrizione fisica | 1 online resource (39 pages) |
| Disciplina | 004.16 |
| Soggetto topico | Systems on a chip |
| ISBN | 1-5090-8968-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
Trust, Security and Privacy in Computing and Communications
2007 International Symposium on System-on-Chip |
| Record Nr. | UNINA-9910138931303321 |
| Piscataway, N.J. : , : IEEE, , 2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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