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Real time UML workshop for embedded systems / / by Bruce Powell Douglass
Real time UML workshop for embedded systems / / by Bruce Powell Douglass
Autore Douglass Bruce Powel
Edizione [1st edition]
Pubbl/distr/stampa Massachusettes, : Elsevier, c2007
Descrizione fisica 1 online resource (433 p.)
Disciplina 005.117
Collana Embedded technology series
Soggetto topico Embedded computer systems - Programming
Real-time data processing
Object-oriented methods (Computer science)
ISBN 1-281-00685-8
9786611006853
0-08-049223-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Real-Time UML Workshop for Embedded Systems; Copyright Page; Contents; Preface; Audience; Goals; Where to Go After the Book; Evaluate UML on ARM; Acknowledgments; About the Author; What's on the CD-ROM?; Chapter 1. Introduction; Basic Modeling Concepts of the UML; Structural Elements and Diagrams; Behavioral Elements and Diagrams; Use Case and Requirements Models; Summary; Check Out the CD-ROM; Chapter 2. The Harmony Process; Introduction; The Harmony Development Process; Summary; Chapter 3. Specifying Requirements; Overview
Problem 3.1 Identifying Kinds of Requirements for Roadrunner Traffic Light Control SystemProblem 3.2 Identifying Use Cases for the Roadrunner Traffic Light Control System; Problem 3.3 Mapping Requirements to Use Cases; Problem 3.4 Identifying Use Cases for the Coyote UAV System; Problem 3.5 Identifying Parametric Requirements; Problem 3.6 Capturing Quality of Service Requirements in Use Cases; Problem 3.7 Operational View: Identifying Traffic Light Scenarios; Problem 3.8 Operational View: CUAVS Optical Surveillance Scenarios; Problem 3.9 Specification View: Use-Case Description
Specification View: State Machines for Requirements CaptureProblem 3.10 Specification View: Capturing Complex Requirements; Problem 3.11 Operational to Specification View: Capturing Operational Contracts; References; Chapter 4. Systems Architecture; Overview; Problem 4.1 Organizing the Systems Model; Problem 4.2 Subsystem Identification; Problem 4.3 Mapping Operational Contracts into Subsystem Architecture; Problem 4.4 Identifying Subsystem Use Cases; Looking Ahead; Chapter 5. Object Analysis; Overview; Key Strategies for Object Identification
Problem 5.1 Apply Nouns and Causal Agents StrategiesProblem 5.2 Apply Services and Messages Strategies; Problem 5.3 Apply Real-World Items and Physical Devices Strategies; Problem 5.4 Apply Key Concepts and Transaction Strategies; Problem 5.5 Apply Identify Visual Elements and Scenarios Strategies; Problem 5.6 Merge Models from the Various Strategies; Looking Ahead; Chapter 6. Architectural Design; Overview; Problem 6.1 Concurrency and Resource Architecture; Problem 6.2 Distribution Architecture; Problem 6.3 Safety and Reliability Architecture; Looking Ahead
Chapter 7. Mechanistic and Detailed DesignOverview; Mechanistic Design; Detailed Design; Problem 7.1 Applying Mechanistic Design Patterns-Part 1; Problem 7.2 Applying Mechanistic Design Patterns-Part 2; Problem 7.3 Applying Detailed-Design State Behavior Patterns; Problem 7.4 Applying Detailed Design Idioms; Summary; Chapter 8. Specifying Requirements: Answers; Answer 3.1 Identifying Kinds of Requirements; Answer 3.2 Identifying Use Cases for Roadrunner Traffic Light Control System; Answer 3.3 Mapping Requirements to Use Cases; Answer 3.4 Identifying Use Cases for Coyote UAV System
Answer 3.5 Identifying Parametric Requirements
Record Nr. UNINA-9910809962903321
Douglass Bruce Powel  
Massachusettes, : Elsevier, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Reusable software components : object-oriented embedded systems programming in C / / Ted Van Sickle
Reusable software components : object-oriented embedded systems programming in C / / Ted Van Sickle
Autore Van Sickle Ted
Pubbl/distr/stampa Upper Saddle River, N.J. : , : Prentice Hall PTR, , 1997
Descrizione fisica 1 online resource (viii, 294 pages) : illustrations
Disciplina 629.8/9
Collana Advisory circular
Soggetto topico Object-oriented programming (Computer science)
C (Computer program language)
Embedded computer systems - Programming
Computer software - Reusability
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910698534903321
Van Sickle Ted  
Upper Saddle River, N.J. : , : Prentice Hall PTR, , 1997
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
See MIPS run [[electronic resource] /] / Dominic Sweetman
See MIPS run [[electronic resource] /] / Dominic Sweetman
Autore Sweetman Dominic
Edizione [2nd ed.]
Pubbl/distr/stampa San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Descrizione fisica 1 online resource (513 p.)
Disciplina 004.165
Collana The Morgan Kaufmann Series in Computer Architecture and Design
Soggetto topico MIPS (Computer architecture)
RISC microprocessors
Embedded computer systems - Programming
Soggetto genere / forma Electronic books.
ISBN 1-281-02320-5
9786611023201
0-08-052523-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; See MIPS® Run; Copyright Page; Foreword; Contents; Preface; Style and Limits; Conventions; Acknowledgments; Chapter 1. RISCs and MIPS Architectures; 1.1 Pipelines; 1.2 The MIPS Five-Stage Pipeline; 1.3 RISC and CISC; 1.4 Great MIPS Chips of the Past and Present; 1.5 MIPS Compared with CISC Architectures; Chapter 2. MIPS Architecture; 2.1 A Flavor of MIPS Assembly Language; 2.2 Registers; 2.3 Integer Multiply Unit and Registers; 2.4 Loading and Storing: Addressing Modes; 2.5 Data Types in Memory and Registers; 2.6 Synthesized Instructions in Assembly Language
2.7 MIPS I to MIPS64 ISAs: 64-Bit (and Other) Extensions2.8 Basic Address Space; 2.9 Pipeline Visibility; Chapter 3. Coprocessor 0: MIPS Processor Control; 3.1 CPU Control Instructions; 3.2 Which Registers Are RelevantWhen?; 3.3 CPU Control Registers and Their Encoding; 3.4 CP0 Hazards-A Trap for the Unwary; Chapter 4. How CachesWork on MIPS Processors; 4.1 Caches and Cache Management; 4.2 How CachesWork; 4.3 Write-Through Caches in Early MIPS CPUs; 4.4 Write-Back Caches in MIPS CPUs; 4.5 Other Choices in Cache Design; 4.6 Managing Caches; 4.7 L2 and L3 Caches
4.8 Cache Configurations for MIPS CPUs4.9 Programming MIPS32/64 Caches; 4.10 Cache Efficiency; 4.11 Reorganizing Software to Influence Cache Efficiency; 4.12 Cache Aliases; Chapter 5. Exceptions, Interrupts, and Initialization; 5.1 Precise Exceptions; 5.2 When Exceptions Happen; 5.3 Exception Vectors:Where Exception Handling Starts; 5.4 Exception Handling: Basics; 5.5 Returning from an Exception; 5.6 Nesting Exceptions; 5.7 An Exception Routine; 5.8 Interrupts; 5.9 Starting Up; 5.10 Emulating Instructions; Chapter 6. Low-level Memory Management and the TLB
6.1 The TLB/MMU Hardware andWhat It Does6.2 TLB/MMU Registers Described; 6.3 TLB/MMU Control Instructions; 6.4 Programming the TLB; 6.5 Hardware-Friendly Page Tables and Refill Mechanism; 6.6 Everyday Use of the MIPS TLB; 6.7 Memory Management in a Simpler OS; Chapter 7. Floating-Point Support; 7.1 A Basic Description of Floating Point; 7.2 The IEEE 754 Standard and Its Background; 7.3 How IEEE Floating-Point Numbers Are Stored; 7.4 MIPS Implementation of IEEE 754; 7.5 Floating-Point Registers; 7.6 Floating-Point Exceptions/Interrupts; 7.7 Floating-Point Control: The Control/Status Register
7.8 Floating-Point Implementation Register7.9 Guide to FP Instructions; 7.10 Paired-Single Floating-Point Instructions and the MIPS-3D ASE; 7.11 Instruction Timing Requirements; 7.12 Instruction Timing for Speed; 7.13 Initialization and Enabling on Demand; 7.14 Floating-Point Emulation; Chapter 8. Complete Guide to the MIPS Instruction Set; 8.1 A Simple Example; 8.2 Assembly Instructions andWhat They Mean; 8.3 Floating-Point Instructions; 8.4 Differences in MIPS32/64 Release 1; 8.5 Peculiar Instructions and Their Purposes; 8.6 Instruction Encodings; 8.7 Instructions by Functional Group
Chapter 9. Reading MIPS Assembly Language
Record Nr. UNINA-9910458480803321
Sweetman Dominic  
San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
See MIPS run [[electronic resource] /] / Dominic Sweetman
See MIPS run [[electronic resource] /] / Dominic Sweetman
Autore Sweetman Dominic
Edizione [2nd ed.]
Pubbl/distr/stampa San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Descrizione fisica 1 online resource (513 p.)
Disciplina 004.165
Collana The Morgan Kaufmann Series in Computer Architecture and Design
Soggetto topico MIPS (Computer architecture)
RISC microprocessors
Embedded computer systems - Programming
ISBN 1-281-02320-5
9786611023201
0-08-052523-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; See MIPS® Run; Copyright Page; Foreword; Contents; Preface; Style and Limits; Conventions; Acknowledgments; Chapter 1. RISCs and MIPS Architectures; 1.1 Pipelines; 1.2 The MIPS Five-Stage Pipeline; 1.3 RISC and CISC; 1.4 Great MIPS Chips of the Past and Present; 1.5 MIPS Compared with CISC Architectures; Chapter 2. MIPS Architecture; 2.1 A Flavor of MIPS Assembly Language; 2.2 Registers; 2.3 Integer Multiply Unit and Registers; 2.4 Loading and Storing: Addressing Modes; 2.5 Data Types in Memory and Registers; 2.6 Synthesized Instructions in Assembly Language
2.7 MIPS I to MIPS64 ISAs: 64-Bit (and Other) Extensions2.8 Basic Address Space; 2.9 Pipeline Visibility; Chapter 3. Coprocessor 0: MIPS Processor Control; 3.1 CPU Control Instructions; 3.2 Which Registers Are RelevantWhen?; 3.3 CPU Control Registers and Their Encoding; 3.4 CP0 Hazards-A Trap for the Unwary; Chapter 4. How CachesWork on MIPS Processors; 4.1 Caches and Cache Management; 4.2 How CachesWork; 4.3 Write-Through Caches in Early MIPS CPUs; 4.4 Write-Back Caches in MIPS CPUs; 4.5 Other Choices in Cache Design; 4.6 Managing Caches; 4.7 L2 and L3 Caches
4.8 Cache Configurations for MIPS CPUs4.9 Programming MIPS32/64 Caches; 4.10 Cache Efficiency; 4.11 Reorganizing Software to Influence Cache Efficiency; 4.12 Cache Aliases; Chapter 5. Exceptions, Interrupts, and Initialization; 5.1 Precise Exceptions; 5.2 When Exceptions Happen; 5.3 Exception Vectors:Where Exception Handling Starts; 5.4 Exception Handling: Basics; 5.5 Returning from an Exception; 5.6 Nesting Exceptions; 5.7 An Exception Routine; 5.8 Interrupts; 5.9 Starting Up; 5.10 Emulating Instructions; Chapter 6. Low-level Memory Management and the TLB
6.1 The TLB/MMU Hardware andWhat It Does6.2 TLB/MMU Registers Described; 6.3 TLB/MMU Control Instructions; 6.4 Programming the TLB; 6.5 Hardware-Friendly Page Tables and Refill Mechanism; 6.6 Everyday Use of the MIPS TLB; 6.7 Memory Management in a Simpler OS; Chapter 7. Floating-Point Support; 7.1 A Basic Description of Floating Point; 7.2 The IEEE 754 Standard and Its Background; 7.3 How IEEE Floating-Point Numbers Are Stored; 7.4 MIPS Implementation of IEEE 754; 7.5 Floating-Point Registers; 7.6 Floating-Point Exceptions/Interrupts; 7.7 Floating-Point Control: The Control/Status Register
7.8 Floating-Point Implementation Register7.9 Guide to FP Instructions; 7.10 Paired-Single Floating-Point Instructions and the MIPS-3D ASE; 7.11 Instruction Timing Requirements; 7.12 Instruction Timing for Speed; 7.13 Initialization and Enabling on Demand; 7.14 Floating-Point Emulation; Chapter 8. Complete Guide to the MIPS Instruction Set; 8.1 A Simple Example; 8.2 Assembly Instructions andWhat They Mean; 8.3 Floating-Point Instructions; 8.4 Differences in MIPS32/64 Release 1; 8.5 Peculiar Instructions and Their Purposes; 8.6 Instruction Encodings; 8.7 Instructions by Functional Group
Chapter 9. Reading MIPS Assembly Language
Record Nr. UNINA-9910784549403321
Sweetman Dominic  
San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
See MIPS run / / Dominic Sweetman
See MIPS run / / Dominic Sweetman
Autore Sweetman Dominic
Edizione [2nd ed.]
Pubbl/distr/stampa San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Descrizione fisica 1 online resource (513 p.)
Disciplina 004.165
Collana The Morgan Kaufmann Series in Computer Architecture and Design
Soggetto topico MIPS (Computer architecture)
RISC microprocessors
Embedded computer systems - Programming
ISBN 1-281-02320-5
9786611023201
0-08-052523-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; See MIPS® Run; Copyright Page; Foreword; Contents; Preface; Style and Limits; Conventions; Acknowledgments; Chapter 1. RISCs and MIPS Architectures; 1.1 Pipelines; 1.2 The MIPS Five-Stage Pipeline; 1.3 RISC and CISC; 1.4 Great MIPS Chips of the Past and Present; 1.5 MIPS Compared with CISC Architectures; Chapter 2. MIPS Architecture; 2.1 A Flavor of MIPS Assembly Language; 2.2 Registers; 2.3 Integer Multiply Unit and Registers; 2.4 Loading and Storing: Addressing Modes; 2.5 Data Types in Memory and Registers; 2.6 Synthesized Instructions in Assembly Language
2.7 MIPS I to MIPS64 ISAs: 64-Bit (and Other) Extensions2.8 Basic Address Space; 2.9 Pipeline Visibility; Chapter 3. Coprocessor 0: MIPS Processor Control; 3.1 CPU Control Instructions; 3.2 Which Registers Are RelevantWhen?; 3.3 CPU Control Registers and Their Encoding; 3.4 CP0 Hazards-A Trap for the Unwary; Chapter 4. How CachesWork on MIPS Processors; 4.1 Caches and Cache Management; 4.2 How CachesWork; 4.3 Write-Through Caches in Early MIPS CPUs; 4.4 Write-Back Caches in MIPS CPUs; 4.5 Other Choices in Cache Design; 4.6 Managing Caches; 4.7 L2 and L3 Caches
4.8 Cache Configurations for MIPS CPUs4.9 Programming MIPS32/64 Caches; 4.10 Cache Efficiency; 4.11 Reorganizing Software to Influence Cache Efficiency; 4.12 Cache Aliases; Chapter 5. Exceptions, Interrupts, and Initialization; 5.1 Precise Exceptions; 5.2 When Exceptions Happen; 5.3 Exception Vectors:Where Exception Handling Starts; 5.4 Exception Handling: Basics; 5.5 Returning from an Exception; 5.6 Nesting Exceptions; 5.7 An Exception Routine; 5.8 Interrupts; 5.9 Starting Up; 5.10 Emulating Instructions; Chapter 6. Low-level Memory Management and the TLB
6.1 The TLB/MMU Hardware andWhat It Does6.2 TLB/MMU Registers Described; 6.3 TLB/MMU Control Instructions; 6.4 Programming the TLB; 6.5 Hardware-Friendly Page Tables and Refill Mechanism; 6.6 Everyday Use of the MIPS TLB; 6.7 Memory Management in a Simpler OS; Chapter 7. Floating-Point Support; 7.1 A Basic Description of Floating Point; 7.2 The IEEE 754 Standard and Its Background; 7.3 How IEEE Floating-Point Numbers Are Stored; 7.4 MIPS Implementation of IEEE 754; 7.5 Floating-Point Registers; 7.6 Floating-Point Exceptions/Interrupts; 7.7 Floating-Point Control: The Control/Status Register
7.8 Floating-Point Implementation Register7.9 Guide to FP Instructions; 7.10 Paired-Single Floating-Point Instructions and the MIPS-3D ASE; 7.11 Instruction Timing Requirements; 7.12 Instruction Timing for Speed; 7.13 Initialization and Enabling on Demand; 7.14 Floating-Point Emulation; Chapter 8. Complete Guide to the MIPS Instruction Set; 8.1 A Simple Example; 8.2 Assembly Instructions andWhat They Mean; 8.3 Floating-Point Instructions; 8.4 Differences in MIPS32/64 Release 1; 8.5 Peculiar Instructions and Their Purposes; 8.6 Instruction Encodings; 8.7 Instructions by Functional Group
Chapter 9. Reading MIPS Assembly Language
Altri titoli varianti See MIPS run Linux
Record Nr. UNINA-9910826308303321
Sweetman Dominic  
San Francisco, Calif., : Morgan Kaufmann Publishers/Elsevier, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Self-organization in embedded real-time systems / / M. Teresa Higuera-Toledano, Uwe Brinkschulte, Achim Rettberg, editors
Self-organization in embedded real-time systems / / M. Teresa Higuera-Toledano, Uwe Brinkschulte, Achim Rettberg, editors
Pubbl/distr/stampa New York, : Springer Science+Business Media, LLC, 2013
Descrizione fisica 1 online resource (214 p.)
Disciplina 004.33
Altri autori (Persone) Higuera-ToledanoM. Teresa
BrinkschulteUwe
RettbergAchim
Soggetto topico Embedded computer systems - Programming
Real-time data processing
ISBN 1-283-91115-9
1-4614-1969-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto A Control Theory Approach to Improve Microprocessors for Real-Time Applications by Self-Adapting Thread Performance -- Providing safety-critical and real-time services for mobile devices in uncertain environment -- Self-Organizing Real-Time Services in Mobile Ad Hoc Networks -- Swarm Robotic Time Synchronization for Object Tracking -- Improving Performance of Controller Area Network (CAN) by Adaptive Message Scheduling -- Self-configurable Automotive Embedded Systems -- Composing Adaptive Distributed Embedded and Real-Time Java Systems Based on RTSJ -- The ASSL Formalism for Real-Time Autonomic Systems -- Organic Real-Time Middleware.
Record Nr. UNINA-9910437912303321
New York, : Springer Science+Business Media, LLC, 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Software technologies for embedded and ubiquitous systems : 8th IFIP WG 10.2 International Workshop, SEUS 2010, Waidhofen/YBBS, Austria, October 13-15, 2010 : proceedings / / Sang Lyul Min ... [et al.], (eds.)
Software technologies for embedded and ubiquitous systems : 8th IFIP WG 10.2 International Workshop, SEUS 2010, Waidhofen/YBBS, Austria, October 13-15, 2010 : proceedings / / Sang Lyul Min ... [et al.], (eds.)
Edizione [1st ed.]
Pubbl/distr/stampa Berlin, : Springer, 2010
Descrizione fisica 1 online resource (XI, 253 p. 90 illus.)
Disciplina 005.1
Altri autori (Persone) MinSang Lyul
Collana Lecture notes in computer science
LNCS sublibrary. SL 3, Information systems and applications, incl. Internet/Web, and HCI
Soggetto topico Embedded computer systems - Programming
Ubiquitous computing
Electronic data processing - Distributed processing
ISBN 3-642-16256-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910484037603321
Berlin, : Springer, 2010
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Software technologies for embedded and ubiquitous systems : 7th IFIP WG 10.2 international workshop, SEUS 2009 Newport Beach, CA, USA, November 16-18, 2009 ; proceedings / / Sunggu Lee, Priya Narasimhan (eds.)
Software technologies for embedded and ubiquitous systems : 7th IFIP WG 10.2 international workshop, SEUS 2009 Newport Beach, CA, USA, November 16-18, 2009 ; proceedings / / Sunggu Lee, Priya Narasimhan (eds.)
Edizione [1st ed. 2009.]
Pubbl/distr/stampa New York ; ; Berlin, : Springer, c2009
Descrizione fisica 1 online resource (XI, 378 p.)
Disciplina 621.3819
Altri autori (Persone) LeeSunggu
NarasimhanPriya
Collana Lecture notes in computer science
Soggetto topico Embedded computer systems - Programming
Ubiquitous computing
ISBN 3-642-10265-4
Classificazione DAT 260f
SS 4800
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Design and Implementation of an Operational Flight Program for an Unmanned Helicopter FCC Based on the TMO Scheme -- Energy-Efficient Process Allocation Algorithms in Peer-to-Peer Systems -- Power Modeling of Solid State Disk for Dynamic Power Management Policy Design in Embedded Systems -- Optimizing Mobile Application Performance with Model–Driven Engineering -- A Single-Path Chip-Multiprocessor System -- Towards Trustworthy Self-optimization for Distributed Systems -- An Experimental Framework for the Analysis and Validation of Software Clocks -- Towards a Statistical Model of a Microprocessor’s Throughput by Analyzing Pipeline Stalls -- Joining a Distributed Shared Memory Computation in a Dynamic Distributed System -- BSART (Broadcasting with Selected Acknowledgements and Repeat Transmissions) for Reliable and Low-Cost Broadcasting in the Mobile Ad-Hoc Network -- DPDP: An Algorithm for Reliable and Smaller Congestion in the Mobile Ad-Hoc Network -- Development of Field Monitoring Server System and Its Application in Agriculture -- On-Line Model Checking as Operating System Service -- Designing Highly Available Repositories for Heterogeneous Sensor Data in Open Home Automation Systems -- Fine-Grained Tailoring of Component Behaviour for Embedded Systems -- MapReduce System over Heterogeneous Mobile Devices -- Towards Time-Predictable Data Caches for Chip-Multiprocessors -- From Intrusion Detection to Intrusion Detection and Diagnosis: An Ontology-Based Approach -- Model-Based Testing of GUI-Driven Applications -- Parallelizing Software-Implemented Error Detection -- Model-Based Analysis of Contract-Based Real-Time Scheduling -- Exploring the Design Space for Network Protocol Stacks on Special-Purpose Embedded Systems -- HiperSense: An Integrated System for Dense Wireless Sensing and Massively Scalable Data Visualization -- Applying Architectural Hybridization in Networked Embedded Systems -- Concurrency and Communication: Lessons from the SHIM Project -- Location-Aware Web Service by Utilizing Web Contents Including Location Information -- The GENESYS Architecture: A Conceptual Model for Component-Based Distributed Real-Time Systems -- Approximate Worst-Case Execution Time Analysis for Early Stage Embedded Systems Development -- Using Context Awareness to Improve Quality of Information Retrieval in Pervasive Computing -- An Algorithm to Ensure Spatial Consistency in Collaborative Photo Collections -- Real-Sense Media Representation Technology Using Multiple Devices Synchronization -- Overview of Multicore Requirements towards Real-Time Communication -- Lifting the Level of Abstraction Dealt with in Programming of Networked Embedded Computing Systems.
Record Nr. UNINA-9910483224203321
New York ; ; Berlin, : Springer, c2009
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Software technologies for embedded and ubiquitous systems : 6th IFIP WG 10.2 international workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008. proceedings / / Uwe Brinkschulte, Tony Givargis, Stefano Russo (editors)
Software technologies for embedded and ubiquitous systems : 6th IFIP WG 10.2 international workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008. proceedings / / Uwe Brinkschulte, Tony Givargis, Stefano Russo (editors)
Edizione [1st ed. 2008.]
Pubbl/distr/stampa Berlin, Germany ; ; New York, New York : , : Springer-Verlag, , [2008]
Descrizione fisica 1 online resource (XIV, 432 p.)
Disciplina 004.36
Collana Information Systems and Applications, incl. Internet/Web, and HCI
Soggetto topico Embedded computer systems - Programming
Ubiquitous computing
Electronic data processing - Distributed processing
ISBN 3-540-87785-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Model-Driven Development -- Using UML 2.1 to Model Multi-agent Systems -- Designing Fault-Tolerant Component Based Applications with a Model Driven Approach -- Model Based Synthesis of Embedded Software -- Formal Specification of Gateways in Integrated Architectures -- Model-Integrated Development of Cyber-Physical Systems -- Middleware -- Towards a Middleware Approach for a Self-configurable Automotive Embedded System -- Context-Aware Middleware for Reliable Multi-hop Multi-path Connectivity -- Service Orchestration Using the Chemical Metaphor -- Guiding Organic Management in a Service-Oriented Real-Time Middleware Architecture -- Self-describing and Data Propagation Model for Data Distribution Service -- Real Time -- Improving Real-Time Performance of a Virtual Machine Monitor Based System -- A Two-Layered Management Architecture for Building Adaptive Real-Time Systems -- Real-Time Access Guarantees for NAND Flash Using Partial Block Cleaning -- An Operating System for a Time-Predictable Computing Node -- Data Services in Distributed Real-Time Embedded Systems -- Quality of Service and Performance -- QoS-Adaptive Router Based on Per-Flow Management over NGN -- Analysis of User Perceived QoS in Ubiquitous UMTS Environments Subject to Faults -- Cost-Performance Tradeoff for Embedded Systems -- Resolving Performance Anomaly Using ARF-Aware TCP -- Applications -- Context-Aware Deployment of Services in Public Spaces -- An Ontology Supported Meta-interface for the Development and Installation of Customized Web Based Telemedicine Systems -- Cyber Biosphere for Future Embedded Systems -- Leveraging GIS Technologies for Web-Based Smart Places Services -- Pervasive and Mobile Systems -- VeryIDX - A Digital Identity Management System for Pervasive Computing Environments -- Delay-Aware Mobile Transactions -- An Operating System Architecture for Future Information Appliances -- M-Geocast: Robust and Energy-Efficient Geometric Routing for Mobile Sensor Networks -- Wireless Embedded Systems -- Toward Integrated Virtual Execution Platform for Large-Scale Distributed Embedded Systems -- A Novel Approach for Security and Robustness in Wireless Embedded Systems -- The Role of Field Data for Analyzing the Dependability of Short Range Wireless Technologies -- RG-EDF: An I/O Scheduling Policy for Flash Equipped Sensor Devices -- Methods for Increasing Coverage in Wireless Sensor Networks -- Synthesis, Verification and Protection -- Locks Considered Harmful: A Look at Non-traditional Synchronization -- From Model Driven Engineering to Verification Driven Engineering -- On Scalable Synchronization for Distributed Embedded Real-Time Systems -- Implementation of an Obfuscation Tool for C/C++ Source Code Protection on the XScale Architecture -- Automated Maintainability of TTCN-3 Test Suites Based on Guideline Checking.
Record Nr. UNISA-996465295803316
Berlin, Germany ; ; New York, New York : , : Springer-Verlag, , [2008]
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Software technologies for embedded and ubiquitous systems : 6th IFIP WG 10.2 international workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008. proceedings / / Uwe Brinkschulte, Tony Givargis, Stefano Russo (editors)
Software technologies for embedded and ubiquitous systems : 6th IFIP WG 10.2 international workshop, SEUS 2008, Anacarpi, Capri Island, Italy, October 1-3, 2008. proceedings / / Uwe Brinkschulte, Tony Givargis, Stefano Russo (editors)
Edizione [1st ed. 2008.]
Pubbl/distr/stampa Berlin, Germany ; ; New York, New York : , : Springer-Verlag, , [2008]
Descrizione fisica 1 online resource (XIV, 432 p.)
Disciplina 004.36
Collana Information Systems and Applications, incl. Internet/Web, and HCI
Soggetto topico Embedded computer systems - Programming
Ubiquitous computing
Electronic data processing - Distributed processing
ISBN 3-540-87785-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Model-Driven Development -- Using UML 2.1 to Model Multi-agent Systems -- Designing Fault-Tolerant Component Based Applications with a Model Driven Approach -- Model Based Synthesis of Embedded Software -- Formal Specification of Gateways in Integrated Architectures -- Model-Integrated Development of Cyber-Physical Systems -- Middleware -- Towards a Middleware Approach for a Self-configurable Automotive Embedded System -- Context-Aware Middleware for Reliable Multi-hop Multi-path Connectivity -- Service Orchestration Using the Chemical Metaphor -- Guiding Organic Management in a Service-Oriented Real-Time Middleware Architecture -- Self-describing and Data Propagation Model for Data Distribution Service -- Real Time -- Improving Real-Time Performance of a Virtual Machine Monitor Based System -- A Two-Layered Management Architecture for Building Adaptive Real-Time Systems -- Real-Time Access Guarantees for NAND Flash Using Partial Block Cleaning -- An Operating System for a Time-Predictable Computing Node -- Data Services in Distributed Real-Time Embedded Systems -- Quality of Service and Performance -- QoS-Adaptive Router Based on Per-Flow Management over NGN -- Analysis of User Perceived QoS in Ubiquitous UMTS Environments Subject to Faults -- Cost-Performance Tradeoff for Embedded Systems -- Resolving Performance Anomaly Using ARF-Aware TCP -- Applications -- Context-Aware Deployment of Services in Public Spaces -- An Ontology Supported Meta-interface for the Development and Installation of Customized Web Based Telemedicine Systems -- Cyber Biosphere for Future Embedded Systems -- Leveraging GIS Technologies for Web-Based Smart Places Services -- Pervasive and Mobile Systems -- VeryIDX - A Digital Identity Management System for Pervasive Computing Environments -- Delay-Aware Mobile Transactions -- An Operating System Architecture for Future Information Appliances -- M-Geocast: Robust and Energy-Efficient Geometric Routing for Mobile Sensor Networks -- Wireless Embedded Systems -- Toward Integrated Virtual Execution Platform for Large-Scale Distributed Embedded Systems -- A Novel Approach for Security and Robustness in Wireless Embedded Systems -- The Role of Field Data for Analyzing the Dependability of Short Range Wireless Technologies -- RG-EDF: An I/O Scheduling Policy for Flash Equipped Sensor Devices -- Methods for Increasing Coverage in Wireless Sensor Networks -- Synthesis, Verification and Protection -- Locks Considered Harmful: A Look at Non-traditional Synchronization -- From Model Driven Engineering to Verification Driven Engineering -- On Scalable Synchronization for Distributed Embedded Real-Time Systems -- Implementation of an Obfuscation Tool for C/C++ Source Code Protection on the XScale Architecture -- Automated Maintainability of TTCN-3 Test Suites Based on Guideline Checking.
Record Nr. UNINA-9910483514603321
Berlin, Germany ; ; New York, New York : , : Springer-Verlag, , [2008]
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