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Compositionality : the significant difference : international symposium, COMPOS '97, Bad Malente, Germany, September 8-12, 1997 : revised lectures / / Willem-Paul de Roever, Hans Langmaack, Amir Pnueli (editors)
| Compositionality : the significant difference : international symposium, COMPOS '97, Bad Malente, Germany, September 8-12, 1997 : revised lectures / / Willem-Paul de Roever, Hans Langmaack, Amir Pnueli (editors) |
| Edizione | [1st ed. 1998.] |
| Pubbl/distr/stampa | Berlin : , : Springer, , [1998] |
| Descrizione fisica | 1 online resource (VIII, 647 p. 16 illus.) |
| Disciplina | 004.35 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Parallel processing (Electronic computers)
Automatic theorem proving |
| ISBN | 3-540-49213-5 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | The Need for Compositional Proof Systems: A Survey -- Alternating-time Temporal Logic -- Compositionality in dataflow synchronous languages: specification & code generation -- Compositional Reasoning in Model Checking -- Modeling Urgency in Timed Systems -- Compositional Refinement of Interactive Systems Modelled by Relations -- Toward Parametric Verification of Open Distributed Systems -- A Compositional Real-time Semantics of STATEMATE Designs -- Deductive Verification of Modular Systems -- Compositional Verification of Real-Time Applications -- Compositional Proofs for Concurrent Objects -- An overview of compositional translations -- Compositional Verification of Multi-Agent Systems: a Formal Analysis of Pro-activeness and Reactiveness -- Modular Model Checking -- Composition: A Way to Make Proofs Harder -- Compositionality Criteria for Defining Mixed-Styles Synchronous Languages -- Compositional Reasoning using Interval Temporal Logic and Tempura -- Decomposing Real-Time Specifications -- On the Combination of Synchronous Languages -- Compositional Verification of Randomized Distributed Algorithms -- Lazy Compositional Verication -- Compositional Reasoning Using the Assumption-Commitment Paradigm -- An Adequate First Order Interval Logic -- Compositional Transformational Design for Concurrent Programs -- Compositional proof methods for concurrency: A semantic approach. |
| Record Nr. | UNINA-9910143463503321 |
| Berlin : , : Springer, , [1998] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Compositionality : the significant difference : international symposium, COMPOS '97, Bad Malente, Germany, September 8-12, 1997 : revised lectures / / Willem-Paul de Roever, Hans Langmaack, Amir Pnueli (editors)
| Compositionality : the significant difference : international symposium, COMPOS '97, Bad Malente, Germany, September 8-12, 1997 : revised lectures / / Willem-Paul de Roever, Hans Langmaack, Amir Pnueli (editors) |
| Edizione | [1st ed. 1998.] |
| Pubbl/distr/stampa | Berlin : , : Springer, , [1998] |
| Descrizione fisica | 1 online resource (VIII, 647 p. 16 illus.) |
| Disciplina | 004.35 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Parallel processing (Electronic computers)
Automatic theorem proving |
| ISBN | 3-540-49213-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | The Need for Compositional Proof Systems: A Survey -- Alternating-time Temporal Logic -- Compositionality in dataflow synchronous languages: specification & code generation -- Compositional Reasoning in Model Checking -- Modeling Urgency in Timed Systems -- Compositional Refinement of Interactive Systems Modelled by Relations -- Toward Parametric Verification of Open Distributed Systems -- A Compositional Real-time Semantics of STATEMATE Designs -- Deductive Verification of Modular Systems -- Compositional Verification of Real-Time Applications -- Compositional Proofs for Concurrent Objects -- An overview of compositional translations -- Compositional Verification of Multi-Agent Systems: a Formal Analysis of Pro-activeness and Reactiveness -- Modular Model Checking -- Composition: A Way to Make Proofs Harder -- Compositionality Criteria for Defining Mixed-Styles Synchronous Languages -- Compositional Reasoning using Interval Temporal Logic and Tempura -- Decomposing Real-Time Specifications -- On the Combination of Synchronous Languages -- Compositional Verification of Randomized Distributed Algorithms -- Lazy Compositional Verication -- Compositional Reasoning Using the Assumption-Commitment Paradigm -- An Adequate First Order Interval Logic -- Compositional Transformational Design for Concurrent Programs -- Compositional proof methods for concurrency: A semantic approach. |
| Record Nr. | UNISA-996465892903316 |
| Berlin : , : Springer, , [1998] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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A computational logic / Robert S. Boyer and J. Strother Moore
| A computational logic / Robert S. Boyer and J. Strother Moore |
| Autore | Boyer, Robert S. |
| Pubbl/distr/stampa | New York : Academic Press, c1979 |
| Descrizione fisica | xiv, 397 p. ; 24 cm. |
| Disciplina |
001.5
519.4 |
| Altri autori (Persone) | Moore, J. Strotherauthor |
| Collana | ACM monograph series |
| Soggetto topico |
Automatic theorem proving
Logic programming |
| ISBN | 0121229505 |
| Classificazione | AMS 68N17 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISALENTO-991000774299707536 |
Boyer, Robert S.
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| New York : Academic Press, c1979 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. del Salento | ||
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Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato
| Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato |
| Autore | Pozzato Gian Luca |
| Pubbl/distr/stampa | Amsterdam, : IOS Press, c2010 |
| Descrizione fisica | 1 online resource (208 p.) |
| Disciplina | 511.3 |
| Collana | Frontiers in artificial intelligence and applications Conditional and preferential logics |
| Soggetto topico |
Proof theory
Automatic theorem proving |
| Soggetto genere / forma | Electronic books. |
| ISBN |
6612600764
1-282-60076-1 9786612600760 1-60750-095-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Title page; Preface; Contents; Introduction; Conditional Logics; KLM Logics; A Sequent Calculus for Standard Conditional Logics; Analytic Tableau Calculi for KLM Logics; Theorem Provers for Conditional and KLM Logics; Conclusions and Future Work |
| Record Nr. | UNINA-9910459286303321 |
|
Pozzato Gian Luca
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||
| Amsterdam, : IOS Press, c2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato
| Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato |
| Autore | Pozzato Gian Luca |
| Pubbl/distr/stampa | Amsterdam, : IOS Press, c2010 |
| Descrizione fisica | 1 online resource (208 p.) |
| Disciplina | 511.3 |
| Collana | Frontiers in artificial intelligence and applications Conditional and preferential logics |
| Soggetto topico |
Proof theory
Automatic theorem proving |
| ISBN |
6612600764
1-282-60076-1 9786612600760 1-60750-095-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Title page; Preface; Contents; Introduction; Conditional Logics; KLM Logics; A Sequent Calculus for Standard Conditional Logics; Analytic Tableau Calculi for KLM Logics; Theorem Provers for Conditional and KLM Logics; Conclusions and Future Work |
| Record Nr. | UNINA-9910792352503321 |
|
Pozzato Gian Luca
|
||
| Amsterdam, : IOS Press, c2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato
| Conditional and preferential logics [[electronic resource] ] : proof methods and theorem proving / / Gian Luca Pozzato |
| Autore | Pozzato Gian Luca |
| Pubbl/distr/stampa | Amsterdam, : IOS Press, c2010 |
| Descrizione fisica | 1 online resource (208 p.) |
| Disciplina | 511.3 |
| Collana | Frontiers in artificial intelligence and applications Conditional and preferential logics |
| Soggetto topico |
Proof theory
Automatic theorem proving |
| ISBN |
6612600764
1-282-60076-1 9786612600760 1-60750-095-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Title page; Preface; Contents; Introduction; Conditional Logics; KLM Logics; A Sequent Calculus for Standard Conditional Logics; Analytic Tableau Calculi for KLM Logics; Theorem Provers for Conditional and KLM Logics; Conclusions and Future Work |
| Record Nr. | UNINA-9910818237003321 |
|
Pozzato Gian Luca
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||
| Amsterdam, : IOS Press, c2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Formal analysis of future energy systems using interactive theorem proving / / Asad Ahmed [and three others]
| Formal analysis of future energy systems using interactive theorem proving / / Asad Ahmed [and three others] |
| Autore | Ahmed Asad |
| Edizione | [1st ed. 2022.] |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer, , [2022] |
| Descrizione fisica | 1 online resource (XI, 79 p. 18 illus., 7 illus. in color.) |
| Disciplina | 621.31 |
| Collana | SpringerBriefs in Applied Sciences and Technology |
| Soggetto topico |
Smart power grids - Mathematical models
Smart power grids - Computer simulation Automatic theorem proving |
| ISBN | 3-030-78409-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Interactive Theorem Proving -- Formalization of Stability Theory -- Formalization of Asymptotic Notations -- Formalization of Cost and Utility in Microeconomics -- Conclusions. |
| Record Nr. | UNINA-9910522948003321 |
|
Ahmed Asad
|
||
| Cham, Switzerland : , : Springer, , [2022] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings / / Ganesh Gopalakrishnan, Phillip Windley (editors)
| Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings / / Ganesh Gopalakrishnan, Phillip Windley (editors) |
| Edizione | [1st ed. 1998.] |
| Pubbl/distr/stampa | Berlin : , : Springer, , [1998] |
| Descrizione fisica | 1 online resource (X, 538 p.) |
| Disciplina | 621.392 |
| Collana | Lecture notes in computer science |
| Soggetto topico |
Digital integrated circuits - Computer-aided design
Computer engineering - Computer-aided design Integrated circuits - Verification Automatic theorem proving Formal methods (Computer science) |
| ISBN | 3-540-49519-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Minimalist Proof Assistants: Interactions of Technology and Methodology in Formal System Level Verification -- Reducing Manual Abstraction in Formal Verification of Out- of- Order Execution -- Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking -- Solving Bit-Vector Equations -- The Formal Design of 1M-Gate ASICs -- Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations -- A Tutorial on Stålmarck’s Proof Procedure for Propositional Logic -- Almana: A BDD Minimization Tool Integrating Heuristic and RewritingMethods -- Bisimulation Minimization in an Automata-Theoretic Verification Framework -- Automatic Verification of Mixed-Level Logic Circuits -- A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk -- Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints -- Using MTBDDs for Composition and Model Checking of Real-Time Systems -- Formal Methods in CAD from an Industrial Perspective -- A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool -- Combined Formal Post- and Presynthesis Verification in High Level Synthesis -- Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem -- A Performance Study of BDD-Based Model Checking -- Symbolic Model Checking Visualization -- Input Elimination and Abstraction in Model Checking -- Symbolic Simulation of the JEM1 Microprocessor -- Symbolic Simulation: An ACL2 Approach -- Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study -- Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification -- Formally Verifying Data and Control with Weak Reachability Invariants -- Generalized Reversible Rules -- An Assume-Guarantee Rule for Checking Simulation -- Three Approaches to Hardware Verification: HOL, MDG, and VIS Compared -- An Instruction Set Process Calculus -- Techniques for Implicit State Enumeration of EFSMs -- Model Checking on Product Structures -- BDDNOW: A Parallel BDD Package -- Model Checking VHDL with CV -- Alexandria: A Tool for Hierarchical Verification -- PV: An Explicit Enumeration Model-Checker. |
| Record Nr. | UNINA-9910143467903321 |
| Berlin : , : Springer, , [1998] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings / / Ganesh Gopalakrishnan, Phillip Windley (editors)
| Formal methods in computer-aided design : second international conference, FMCAD '98, Palo Alto, CA, USA, November 4-6, 1998 : proceedings / / Ganesh Gopalakrishnan, Phillip Windley (editors) |
| Edizione | [1st ed. 1998.] |
| Pubbl/distr/stampa | Berlin : , : Springer, , [1998] |
| Descrizione fisica | 1 online resource (X, 538 p.) |
| Disciplina | 621.392 |
| Collana | Lecture notes in computer science |
| Soggetto topico |
Digital integrated circuits - Computer-aided design
Computer engineering - Computer-aided design Integrated circuits - Verification Automatic theorem proving Formal methods (Computer science) |
| ISBN | 3-540-49519-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Minimalist Proof Assistants: Interactions of Technology and Methodology in Formal System Level Verification -- Reducing Manual Abstraction in Formal Verification of Out- of- Order Execution -- Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking -- Solving Bit-Vector Equations -- The Formal Design of 1M-Gate ASICs -- Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations -- A Tutorial on Stålmarck’s Proof Procedure for Propositional Logic -- Almana: A BDD Minimization Tool Integrating Heuristic and RewritingMethods -- Bisimulation Minimization in an Automata-Theoretic Verification Framework -- Automatic Verification of Mixed-Level Logic Circuits -- A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk -- Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints -- Using MTBDDs for Composition and Model Checking of Real-Time Systems -- Formal Methods in CAD from an Industrial Perspective -- A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool -- Combined Formal Post- and Presynthesis Verification in High Level Synthesis -- Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem -- A Performance Study of BDD-Based Model Checking -- Symbolic Model Checking Visualization -- Input Elimination and Abstraction in Model Checking -- Symbolic Simulation of the JEM1 Microprocessor -- Symbolic Simulation: An ACL2 Approach -- Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study -- Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification -- Formally Verifying Data and Control with Weak Reachability Invariants -- Generalized Reversible Rules -- An Assume-Guarantee Rule for Checking Simulation -- Three Approaches to Hardware Verification: HOL, MDG, and VIS Compared -- An Instruction Set Process Calculus -- Techniques for Implicit State Enumeration of EFSMs -- Model Checking on Product Structures -- BDDNOW: A Parallel BDD Package -- Model Checking VHDL with CV -- Alexandria: A Tool for Hierarchical Verification -- PV: An Explicit Enumeration Model-Checker. |
| Record Nr. | UNISA-996465910703316 |
| Berlin : , : Springer, , [1998] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Formal Methods in Computer-Aided Design
| Formal Methods in Computer-Aided Design |
| Pubbl/distr/stampa | Los Alamitos, California : , : IEEE Computer Society |
| Descrizione fisica | online resource |
| Disciplina | 621.3815 |
| Soggetto topico |
Digital integrated circuits - Computer-aided design
Digital integrated circuits - Design and construction - Data processing Computer-aided design Automatic theorem proving Integrated circuits - Verification |
| Soggetto genere / forma |
Periodicals.
Conference papers and proceedings. |
| ISSN | 2642-732X |
| Formato | Materiale a stampa |
| Livello bibliografico | Periodico |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
Proceedings of
Proceedings of Formal Methods in Computer-Aided Design FMCAD .. |
| Record Nr. | UNINA-9910626187403321 |
| Los Alamitos, California : , : IEEE Computer Society | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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