Autore	Lala Parag K. <1948->
Pubbl/distr/stampa	Hoboken, N.J., : Wiley-Interscience, c2007
Descrizione fisica	1 online resource (437 p.)
Disciplina	621.395 621.39732
Soggetto topico	Logic design Logic circuits - Design and construction Digital electronics
ISBN	1-281-00216-X 9786611002169 0-470-12521-7 0-470-12520-9
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	PRINCIPLES OF MODERN DIGITAL DESIGN; CONTENTS; Preface; 1 Number Systems and Binary Codes; 1.1 Introduction; 1.2 Decimal Numbers; 1.3 Binary Numbers; 1.3.1 Basic Binary Arithmetic; 1.4 Octal Numbers; 1.5 Hexadecimal Numbers; 1.6 Signed Numbers; 1.6.1 Diminished Radix Complement; 1.6.2 Radix Complement; 1.7 Floating-Point Numbers; 1.8 Binary Encoding; 1.8.1 Weighted Codes; 1.8.2 Nonweighted Codes; Exercises; 2 Fundamental Concepts of Digital Logic; 2.1 Introduction; 2.2 Sets; 2.3 Relations; 2.4 Partitions; 2.5 Graphs; 2.6 Boolean Algebra; 2.7 Boolean Functions 2.8 Derivation and Classification of Boolean Functions2.9 Canonical Forms of Boolean Functions; 2.10 Logic Gates; Exercises; 3 Combinational Logic Design; 3.1 Introduction; 3.2 Minimization of Boolean Expressions; 3.3 Karnaugh Maps; 3.3.1 Don't Care Conditions; 3.3.2 The Complementary Approach; 3.4 Quine-MCCluskey Method; 3.4.1 Simplification of Boolean Function with Don't Cares; 3.5 Cubical Representation of Boolean Functions; 3.5.1 Tautology; 3.5.2 Complementation Using Shannon's Expansion; 3.6 Heuristic Minimization of Logic Circuits; 3.6.1 Expand; 3.6.2 Reduce; 3.6.3 Irredundant 3.6.4 Espresso3.7 Minimization of Multiple-Output Functions; 3.8 NAND-NAND and NOR-NOR Logic; 3.8.1 NAND-NAND Logic; 3.8.2 NOR-NOR Logic; 3.9 Multilevel Logic Design; 3.9.1 Algebraic and Boolean Division; 3.9.2 Kernels; 3.10 Minimization of Multilevel Circuits Using Don't Cares; 3.10.1 Satisfiability Don't Cares; 3.10.2 Observability Don't Cares; 3.11 Combinational Logic Implementation Using EX-OR and AND Gates; 3.12 Logic Circuit Design Using Multiplexers and Decoders; 3.12.1 Multiplexers; 3.12.2 Demultiplexers and Decoders; 3.13 Arithmetic Circuits; 3.13.1 Half-Adders; 3.13.2 Full Adders 3.13.3 Carry-Lookahead Adders3.13.4 Carry-Select Adder; 3.13.5 Carry-Save Addition; 3.13.6 BCD Adders; 3.13.7 Half-Subtractors; 3.13.8 Full Subtractors; 3.13.9 Two's Complement Subtractors; 3.13.10 BCD Substractors; 3.13.11 Multiplication; 3.13.12 Comparator; 3.14 Combinational Circuit Design Using PLDs; 3.14.1 PROM; 3.14.2 PLA; 3.14.3 PAL; Exercises; References; 4 Fundamentals of Synchronous Sequential Circuits; 4.1 Introduction; 4.2 Synchronous and Asynchronous Operation; 4.3 Latches; 4.4 Flip-Flops; 4.4.1 D Flip-Flop; 4.4.2 JK Flip-Flop; 4.4.3 T Flip-Flop 4.5 Timing in Synchronous Sequential Circuits4.6 State Tables and State Diagrams; 4.7 Mealy and Moore Models; 4.8 Analysis of Synchronous Sequential Circuits; Exercises; References; 5 VHDL in Digital Design; 5.1 Introduction; 5.2 Entity and Architecture; 5.2.1 Entity; 5.2.2 Architecture; 5.3 Lexical Elements in VHDL; 5.4 Data Types; 5.5 Operators; 5.6 Concurrent and Sequential Statements; 5.7 Architecture Description; 5.8 Structural Description; 5.9 Behavioral Description; 5.10 RTL Description; Exercises; 6 Combinational Logic Design Using VHDL; 6.1 Introduction 6.2 Concurrent Assignment Statements
Record Nr.	UNINA-9910830744803321

Pubbl/distr/stampa	Piscataway, New Jersey : , : IEEE Press, , c2009
Descrizione fisica	1 online resource (642 p.)
Disciplina	621.39732
Altri autori (Persone)	StrongAlvin Wayne <1946->
Collana	IEEE Press series on microelectronic systems
Soggetto topico	Metal oxide semiconductors, Complementary - Reliability Microelectronics
ISBN	1-282-33149-3 9786612331497 0-470-45526-8 0-470-45525-X
Classificazione	ELT 358f ZN 4960
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Introduction / Alvin W. Strong -- Dielectric characterization and reliability methodology / Ernest Y. Wu, Rolf-Peter Vollertsen, and Jordi Suñé -- Dielectric breakdown of gate oxides: physics and experiments / Ernest Y. Wu, Rolf-Peter Vollertsen, and Jordi Suñé -- Negative bias temperature instabilities in pMOSFET devices / Giuseppe LaRosa -- Hot carriers / Stewart E. Rauch, III -- Stress-induced voiding / Timothy D. Sullivan -- Electromigration / Timothy D. Sullivan.
Record Nr.	UNINA-9910139868803321

Autore	Pan Sining
Pubbl/distr/stampa	Cham, Switzerland : , : Springer, , [2022]
Descrizione fisica	1 online resource (162 pages) : illustrations
Disciplina	621.39732
Collana	ACSP - Analog circuits and signal processing
Soggetto topico	Temperature measuring instruments Detectors - Design and construction
ISBN	3-030-95284-3
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Record Nr.	UNINA-9910559383503321

Edizione	[1st ed. 2019.]
Pubbl/distr/stampa	Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Descrizione fisica	1 online resource (116 pages)
Disciplina	621.39732
Soggetto topico	Electronic circuits Computer memory systems Electronics Microelectronics Circuits and Systems Electronic Circuits and Devices Memory Structures Electronics and Microelectronics, Instrumentation
ISBN	3-319-97347-9
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Sensing of Spintronic Memories -- Sensing of Resistive RAM -- Sensing Techniques for Ferroelectric based Capacitors and Transistors for Non-Volatile Memory and Logic Applications -- Sensing of Phase Change Memory -- Conclusions. .
Record Nr.	UNINA-9910337468403321

Autore	Singh Raminderpal
Pubbl/distr/stampa	Piscataway, New Jersey : , : IEEE Press, , 2004
Descrizione fisica	1 online resource (370 p.)
Disciplina	621.381528 621.39732
Altri autori (Persone)	OpryskoModest Michael <1957-> HarameDavid Louis
Soggetto topico	Silicon Germanium
ISBN	1-280-34586-1 9786610345861 0-471-66091-4 0-471-66720-X
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Contributors. -- Foreword. -- Preface. -- Acknowledgments. -- Introduction. -- A Historical Perspective at IBM. -- Technology Development. -- Modeling and Characterization. -- Design Automation and Signal Integrity. -- Leading-Edge Applications. -- Appendix. -- Index. -- About the Authors. --
Record Nr.	UNINA-9910143517503321