Emerging Resistive Switching Memories / / by Jianyong Ouyang |
Autore | Ouyang Jianyong |
Edizione | [1st ed. 2016.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
Descrizione fisica | 1 online resource (VIII, 93 p. 73 illus., 41 illus. in color.) |
Disciplina | 621.39732 |
Collana | SpringerBriefs in Materials |
Soggetto topico |
Nanotechnology
Electronic circuits Electronics Microelectronics Computer memory systems Electronic Circuits and Devices Electronics and Microelectronics, Instrumentation Memory Structures |
ISBN | 3-319-31572-2 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Introduction to history of memory devices and the present memory devices -- Introduction of resistive switches memory devices with nanoparticles -- Structure, fabrication and operation of devices with a triple-layer structure sandwiched between two electrode -- Structure, fabrication and operation of devices with a single layer structure sandwiched between two electrode -- Resistive switching devices exploiting the charge transfer between metal electrode and metal nanoparticles -- Mechanisms for resistive switches -- Application of the resistive switching devices with nanoparticles. |
Record Nr. | UNINA-9910254042903321 |
Ouyang Jianyong | ||
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Hybrid CMOS single-electron-transistor device and circuit design / / Santanu Mahapatra, Adrian Mihai Ionescu |
Autore | Mahapatra Santanu |
Pubbl/distr/stampa | Boston, Massachusetts ; , : Artech House, , ©2006 |
Descrizione fisica | 1 online resource (237 p.) |
Disciplina | 621.39732 |
Altri autori (Persone) | IonescuAdrian M |
Collana | Artech House integrated microsystems series |
Soggetto topico |
Metal oxide semiconductors, Complementary
Integrated circuits - Design and construction |
Soggetto genere / forma | Electronic books. |
ISBN | 1-59693-070-5 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Introduction : CMOS scaling and single electronics -- Compact modeling of SETs -- Single-electron transistor logic -- Hybridization of CMOS and SET -- Few electron multiple valued logic and memory design -- Fabrication of SETs and compatibility with silicon CMOS. |
Record Nr. | UNINA-9910451005403321 |
Mahapatra Santanu | ||
Boston, Massachusetts ; , : Artech House, , ©2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Hybrid CMOS single-electron-transistor device and circuit design / / Santanu Mahapatra, Adrian Mihai Ionescu |
Autore | Mahapatra Santanu |
Pubbl/distr/stampa | Boston, Massachusetts ; , : Artech House, , ©2006 |
Descrizione fisica | 1 online resource (237 p.) |
Disciplina | 621.39732 |
Altri autori (Persone) | IonescuAdrian M |
Collana | Artech House integrated microsystems series |
Soggetto topico |
Metal oxide semiconductors, Complementary
Integrated circuits - Design and construction |
ISBN | 1-59693-070-5 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Introduction : CMOS scaling and single electronics -- Compact modeling of SETs -- Single-electron transistor logic -- Hybridization of CMOS and SET -- Few electron multiple valued logic and memory design -- Fabrication of SETs and compatibility with silicon CMOS. |
Record Nr. | UNINA-9910785094903321 |
Mahapatra Santanu | ||
Boston, Massachusetts ; , : Artech House, , ©2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Hybrid CMOS single-electron-transistor device and circuit design / / Santanu Mahapatra, Adrian Mihai Ionescu |
Autore | Mahapatra Santanu |
Pubbl/distr/stampa | Boston, Massachusetts ; , : Artech House, , ©2006 |
Descrizione fisica | 1 online resource (237 p.) |
Disciplina | 621.39732 |
Altri autori (Persone) | IonescuAdrian M |
Collana | Artech House integrated microsystems series |
Soggetto topico |
Metal oxide semiconductors, Complementary
Integrated circuits - Design and construction |
ISBN | 1-59693-070-5 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Introduction : CMOS scaling and single electronics -- Compact modeling of SETs -- Single-electron transistor logic -- Hybridization of CMOS and SET -- Few electron multiple valued logic and memory design -- Fabrication of SETs and compatibility with silicon CMOS. |
Record Nr. | UNINA-9910809523203321 |
Mahapatra Santanu | ||
Boston, Massachusetts ; , : Artech House, , ©2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
IEEE International Memory Workshop |
Pubbl/distr/stampa | Piscataway, NJ : , : IEEE, , 2009- |
Disciplina | 621.39732 |
Soggetto topico |
Semiconductor storage devices
Embedded computer systems Computer architecture |
Soggetto genere / forma | Conference papers and proceedings. |
Formato | Materiale a stampa |
Livello bibliografico | Periodico |
Lingua di pubblicazione | eng |
Altri titoli varianti |
IMW
IEEE International Memory Workshop proceedings |
Record Nr. | UNISA-996581129203316 |
Piscataway, NJ : , : IEEE, , 2009- | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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IEEE Std 1005-1998 : IEEE standard definitions and characterization of floating gate semiconductor arrays / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | New York, N.Y. : , : IEEE, , 1998 |
Descrizione fisica | 1 online resource (vi, 123 pages) : illustrations |
Disciplina | 621.39732 |
Collana | Institute of Electrical and Electronics Engineers |
Soggetto topico | Semiconductor storage devices |
ISBN | 0-7381-3952-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti | IEEE Std 1005-1998: IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays |
Record Nr. | UNINA-9910142244103321 |
New York, N.Y. : , : IEEE, , 1998 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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IEEE Std 1005-1998 : IEEE standard definitions and characterization of floating gate semiconductor arrays / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | New York, N.Y. : , : IEEE, , 1998 |
Descrizione fisica | 1 online resource (vi, 123 pages) : illustrations |
Disciplina | 621.39732 |
Collana | Institute of Electrical and Electronics Engineers |
Soggetto topico | Semiconductor storage devices |
ISBN | 0-7381-3952-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti | IEEE Std 1005-1998: IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays |
Record Nr. | UNISA-996280653403316 |
New York, N.Y. : , : IEEE, , 1998 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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IMW : 2015 IEEE 7th International Memory Workshop : Monterey, CA, 17-20 May 2015 / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2015 |
Descrizione fisica | 1 online resource (264 pages) |
Disciplina | 621.39732 |
Soggetto topico |
Semiconductor storage devices
Random access memory |
ISBN | 1-4673-6933-0 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910131514803321 |
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2015 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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IMW : 2015 IEEE 7th International Memory Workshop : Monterey, CA, 17-20 May 2015 / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2015 |
Descrizione fisica | 1 online resource (264 pages) |
Disciplina | 621.39732 |
Soggetto topico |
Semiconductor storage devices
Random access memory |
ISBN | 1-4673-6933-0 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996280843803316 |
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2015 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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IMW 2018 : 2018 IEEE 10th International Memory Workshop : The Westin Miyako, Kyoto, Japan, 13-16 May 2018 / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018 |
Descrizione fisica | 1 online resource (774 pages) |
Disciplina | 621.39732 |
Soggetto topico |
Semiconductor storage devices
Random access memory |
ISBN | 1-5386-5247-1 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996280708803316 |
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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