Diagnostica digitale : metodi e strumentazione / Luigino Benetazzo, Claudio Narduzzi |
Autore | Benetazzo, Luigino |
Edizione | [2a ed.] |
Pubbl/distr/stampa | Città Studi, 1994 |
Descrizione fisica | 118 p. : ill. ; 24 cm. |
Disciplina | 621.381548 |
Altri autori (Persone) | Narduzzi, Claudioauthor |
Soggetto topico | Circuiti integrati digitali - Diagnostica - Metodi e strumentazione |
ISBN | 8872590485 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | ita |
Record Nr. | UNISALENTO-991000158589707536 |
Benetazzo, Luigino
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Città Studi, 1994 | ||
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Lo trovi qui: Univ. del Salento | ||
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Digital logic testing and simulation [[electronic resource] /] / Alexander Miczo |
Autore | Miczo Alexander |
Edizione | [2nd ed.] |
Pubbl/distr/stampa | Hoboken, NJ, : Wiley-Interscience, c2003 |
Descrizione fisica | 1 online resource (697 p.) |
Disciplina |
621.3815/48
621.381548 |
Soggetto topico | Digital electronics - Testing |
ISBN |
1-280-36610-9
9786610366101 0-470-35712-6 0-471-45777-9 0-471-45778-7 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
DIGITAL LOGIC TESTING AND SIMULATION; CONTENTS; Preface; 1 Introduction; 1.1 Introduction; 1.2 Quality; 1.3 The Test; 1.4 The Design Process; 1.5 Design Automation; 1.6 Estimating Yield; 1.7 Measuring Test Effectiveness; 1.8 The Economics of Test; 1.9 Case Studies; 1.9.1 The Effectiveness of Fault Simulation; 1.9.2 Evaluating Test Decisions; 1.10 Summary; Problems; References; 2 Simulation; 2.1 Introduction; 2.2 Background; 2.3 The Simulation Hierarchy; 2.4 The Logic Symbols; 2.5 Sequential Circuit Behavior; 2.6 The Compiled Simulator; 2.6.1 Ternary Simulation
2.6.2 Sequential Circuit Simulation2.6.3 Timing Considerations; 2.6.4 Hazards; 2.6.5 Hazard Detection; 2.7 Event-Driven Simulation; 2.7.1 Zero-Delay Simulation; 2.7.2 Unit-Delay Simulation; 2.7.3 Nominal-Delay Simulation; 2.8 Multiple-Valued Simulation; 2.9 Implementing the Nominal-Delay Simulator; 2.9.1 The Scheduler; 2.9.2 The Descriptor Cell; 2.9.3 Evaluation Techniques; 2.9.4 Race Detection in Nominal-Delay Simulation; 2.9.5 Min-Max Timing; 2.10 Switch-Level Simulation; 2.11 Binary Decision Diagrams; 2.11.1 Introduction; 2.11.2 The Reduce Operation; 2.11.3 The Apply Operation 2.12 Cycle Simulation2.13 Timing Verification; 2.13.1 Path Enumeration; 2.13.2 Block-Oriented Analysis; 2.14 Summary; Problems; References; 3 Fault Simulation; 3.1 Introduction; 3.2 Approaches to Testing; 3.3 Analysis of a Faulted Circuit; 3.3.1 Analysis at the Component Level; 3.3.2 Gate-Level Symbols; 3.3.3 Analysis at the Gate Level; 3.4 The Stuck-At Fault Model; 3.4.1 The AND Gate Fault Model; 3.4.2 The OR Gate Fault Model; 3.4.3 The Inverter Fault Model; 3.4.4 The Tri-State Fault Model; 3.4.5 Fault Equivalence and Dominance; 3.5 The Fault Simulator: An Overview 3.6 Parallel Fault Processing3.6.1 Parallel Fault Simulation; 3.6.2 Performance Enhancements; 3.6.3 Parallel Pattern Single Fault Propagation; 3.7 Concurrent Fault Simulation; 3.7.1 An Example of Concurrent Simulation; 3.7.2 The Concurrent Fault Simulation Algorithm; 3.7.3 Concurrent Fault Simulation: Further Considerations; 3.8 Delay Fault Simulation; 3.9 Differential Fault Simulation; 3.10 Deductive Fault Simulation; 3.11 Statistical Fault Analysis; 3.12 Fault Simulation Performance; 3.13 Summary; Problems; References; 4 Automatic Test Pattern Generation; 4.1 Introduction 4.2 The Sensitized Path4.2.1 The Sensitized Path: An Example; 4.2.2 Analysis of the Sensitized Path Method; 4.3 The D-Algorithm; 4.3.1 The D-Algorithm: An Analysis; 4.3.2 The Primitive D-Cubes of Failure; 4.3.3 Propagation D-Cubes; 4.3.4 Justification and Implication; 4.3.5 The D-Intersection; 4.4 Testdetect; 4.5 The Subscripted D-Algorithm; 4.6 PODEM; 4.7 FAN; 4.8 Socrates; 4.9 The Critical Path; 4.10 Critical Path Tracing; 4.11 Boolean Differences; 4.12 Boolean Satisfiability; 4.13 Using BDDs for ATPG; 4.13.1 The BDD XOR Operation; 4.13.2 Faulting the BDD Graph; 4.14 Summary; Problems References |
Record Nr. | UNINA-9910143518603321 |
Miczo Alexander
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Hoboken, NJ, : Wiley-Interscience, c2003 | ||
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Lo trovi qui: Univ. Federico II | ||
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Electronic instrumentation and measurement techniques / William D. Cooper, Albert D. Helfrick |
Autore | Helfrick, Albert D. |
Edizione | [3rd ed.] |
Pubbl/distr/stampa | Englewood Cliffs : Prentice-Hall international, c1985 |
Descrizione fisica | XII, 466 p. : ill. ; 23 cm |
Disciplina | 621.381548 |
Altri autori (Persone) | Cooper, William D. |
Soggetto non controllato | Misure elettroniche - Strumenti |
ISBN | 0-13-250762-5 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNIPARTHENOPE-000011706 |
Helfrick, Albert D.
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Englewood Cliffs : Prentice-Hall international, c1985 | ||
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Lo trovi qui: Univ. Parthenope | ||
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Electronic instrumentation and measurements / David A. Bell |
Autore | Bell, David A. <1930- > |
Edizione | [2. ed] |
Pubbl/distr/stampa | Englewood Cliffs (N.J.), : Prentice Hall, c1994 |
Descrizione fisica | XI, 451 p. : ill. ; 25 cm. |
Disciplina |
621.3815
621.381548 |
Soggetto topico |
Strumenti elettronici per misure
Misure elettroniche |
ISBN | 0132499541 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISANNIO-MIL0237581 |
Bell, David A. <1930- >
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Englewood Cliffs (N.J.), : Prentice Hall, c1994 | ||
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Lo trovi qui: Univ. del Sannio | ||
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Electronic measurement and instrumentation / K. B. Klaassen ; translated from Dutch by S. M. Gee |
Autore | Klaassen, Klaas B. <1941- > |
Edizione | [Ristampa digitale] |
Pubbl/distr/stampa | Cambridge, : Cambridge University press, stampa 2003 |
Descrizione fisica | VIII, 335 p. ; 23 cm |
Disciplina |
621.3815
621.381548 |
Soggetto topico |
Misure elettroniche
Strumenti per misure elettroniche |
ISBN |
0521471575
0521477298 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Titolo uniforme | |
Record Nr. | UNISANNIO-NAP0474100 |
Klaassen, Klaas B. <1941- >
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Cambridge, : Cambridge University press, stampa 2003 | ||
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Lo trovi qui: Univ. del Sannio | ||
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Electronic test instruments : [analog and digital measurements] / Robert A. Witte |
Autore | Witte, Robert A. |
Edizione | [2. ed] |
Pubbl/distr/stampa | Upper Saddle River, (N.J.), : Prentice Hall PTR, ©2002 |
Descrizione fisica | XVI, 371 p. ; 25 cm. |
Disciplina | 621.381548 |
Soggetto topico | Misure elettroniche - Strumenti |
ISBN | 0130668303 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNICAS-MIL0582451 |
Witte, Robert A.
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Upper Saddle River, (N.J.), : Prentice Hall PTR, ©2002 | ||
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Lo trovi qui: Univ. di Cassino | ||
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Electronics of measuring systems : practical implementation of analogue and digital techniques / Tran Tien Lang |
Autore | Lang, Tran Tien |
Pubbl/distr/stampa | Chichester, : Wiley, 1987 |
Descrizione fisica | xviii, 318 p. ; 23 cm |
Disciplina | 621.381548 |
Soggetto topico | Misure elettroniche |
ISBN | 0471911577 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNICAS-RML0287980 |
Lang, Tran Tien
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Chichester, : Wiley, 1987 | ||
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Lo trovi qui: Univ. di Cassino | ||
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An engineer's guide to automated testing of high-speed interfaces / / José Moreira, Hubert Werkmann |
Autore | Moreira José <1975-> |
Pubbl/distr/stampa | Boston : , : Artech House, , ©2010 |
Descrizione fisica | 1 online resource (590 p.) |
Disciplina | 621.381548 |
Altri autori (Persone) | WerkmannHubert |
Collana | Artech House microwave library |
Soggetto topico |
Very high speed integrated circuits
Automatic test equipment |
Soggetto genere / forma | Electronic books. |
ISBN | 1-60783-984-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
An Engineer's Guide to Automated Testing of High-Speed Interfaces; Contents; Preface; Acknowledgments; 1 Introduction; 2 High-Speed Digital BasicsThis; 3 High-Speed Interface Standards; 4 ATE Instrumentation for DigitalApplications; 5 Tests and Measurements; 6 Production Testing; 7 Support Instrumentation; 8 Test Fixture Design; 9 Advanced ATE Topics; A Introduction to the Gaussian Distribution and Analytical Computation of the BER; B The Dual Dirac Model and RJ/DJ Separation; C Pseudo-Random Bit Sequences and Other Data Patterns; D Coding, Scrambling, Disparity,and CRC
E Time Domain Reflectometry andTime Domain Transmission(TDR/TDT)F S-Parameters; G Engineering CAD Tools; H Test Fixture Evaluation andCharacterization; I Jitter Injection Calibration; About the Authors; Index |
Altri titoli varianti | Automated testing of high-speed interfaces |
Record Nr. | UNINA-9910458768003321 |
Moreira José <1975->
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Boston : , : Artech House, , ©2010 | ||
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Lo trovi qui: Univ. Federico II | ||
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An engineer's guide to automated testing of high-speed interfaces / / José Moreira, Hubert Werkmann |
Autore | Moreira José <1975-> |
Pubbl/distr/stampa | Boston : , : Artech House, , ©2010 |
Descrizione fisica | 1 online resource (590 p.) |
Disciplina | 621.381548 |
Altri autori (Persone) | WerkmannHubert |
Collana | Artech House microwave library |
Soggetto topico |
Very high speed integrated circuits
Automatic test equipment |
ISBN | 1-60783-984-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
An Engineer's Guide to Automated Testing of High-Speed Interfaces; Contents; Preface; Acknowledgments; 1 Introduction; 2 High-Speed Digital BasicsThis; 3 High-Speed Interface Standards; 4 ATE Instrumentation for DigitalApplications; 5 Tests and Measurements; 6 Production Testing; 7 Support Instrumentation; 8 Test Fixture Design; 9 Advanced ATE Topics; A Introduction to the Gaussian Distribution and Analytical Computation of the BER; B The Dual Dirac Model and RJ/DJ Separation; C Pseudo-Random Bit Sequences and Other Data Patterns; D Coding, Scrambling, Disparity,and CRC
E Time Domain Reflectometry andTime Domain Transmission(TDR/TDT)F S-Parameters; G Engineering CAD Tools; H Test Fixture Evaluation andCharacterization; I Jitter Injection Calibration; About the Authors; Index |
Altri titoli varianti | Automated testing of high-speed interfaces |
Record Nr. | UNINA-9910785116003321 |
Moreira José <1975->
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Boston : , : Artech House, , ©2010 | ||
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Lo trovi qui: Univ. Federico II | ||
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An engineer's guide to automated testing of high-speed interfaces / / José Moreira, Hubert Werkmann |
Autore | Moreira José <1975-> |
Pubbl/distr/stampa | Boston : , : Artech House, , ©2010 |
Descrizione fisica | 1 online resource (590 p.) |
Disciplina | 621.381548 |
Altri autori (Persone) | WerkmannHubert |
Collana | Artech House microwave library |
Soggetto topico |
Very high speed integrated circuits
Automatic test equipment |
ISBN | 1-60783-984-9 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
An Engineer's Guide to Automated Testing of High-Speed Interfaces; Contents; Preface; Acknowledgments; 1 Introduction; 2 High-Speed Digital BasicsThis; 3 High-Speed Interface Standards; 4 ATE Instrumentation for DigitalApplications; 5 Tests and Measurements; 6 Production Testing; 7 Support Instrumentation; 8 Test Fixture Design; 9 Advanced ATE Topics; A Introduction to the Gaussian Distribution and Analytical Computation of the BER; B The Dual Dirac Model and RJ/DJ Separation; C Pseudo-Random Bit Sequences and Other Data Patterns; D Coding, Scrambling, Disparity,and CRC
E Time Domain Reflectometry andTime Domain Transmission(TDR/TDT)F S-Parameters; G Engineering CAD Tools; H Test Fixture Evaluation andCharacterization; I Jitter Injection Calibration; About the Authors; Index |
Altri titoli varianti | Automated testing of high-speed interfaces |
Record Nr. | UNINA-9910827729403321 |
Moreira José <1975->
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Boston : , : Artech House, , ©2010 | ||
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Lo trovi qui: Univ. Federico II | ||
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