Pubbl/distr/stampa	[Place of publication not identified], : IEEE, 2011
Descrizione fisica	1 online resource (407 pages) : illustrations
Disciplina	621.381548
Soggetto topico	Integrated circuits - Testing
ISBN	1-4577-0158-8
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Record Nr.	UNINA-9910141092803321

Pubbl/distr/stampa	Piscataway, New Jersey : , : IEEE, , 2013
Descrizione fisica	1 online resource
Disciplina	621.381548
Soggetto topico	Integrated circuits - Testing
ISBN	1-4799-1170-4
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Table of Contents i -- Welcome Message v -- List of Organizers and Technical Program Committee (TPC) Members vi -- Keynotes -- Design of Future Integrated Systems: A Cyber-physical Systems Approach ix -- Radu Marculescu -- Hardware reliability of embedded systems: are we there yet? x -- Bashir M. Al-Hashimi -- Sub-Threshold Operation and Variability -- Maximizing Yield in Near-Threshold Computing under the Presence of Process Variation 1 -- Nathaniel A. Conos, Saro Meguerdichian, Sheng Wei and Miodrag Potkonjak -- Ultra Low-Power Standard Cell Design using Planar Bulk CMOS in Subthreshold -- Operation 9 -- Marc Pons, Jean-Luc Nagel, Daniel S´everac, Marc Morgan, Daniel Sigg, -- Pierre-Fran¸cois R¨uedi and Christian Piguet -- Empirical Verification of Fault Models for FPGAs Operating in the Subcritical Voltage -- Region 16 -- Alex Birklykke, Peter Koch, Ramjee Prasad, Lars Alminde and Yannick Le Moullec -- Variability analysis of Self-Timed SRAM robustness 24 -- Frank Burns, Abdullah Baz, Delong Shang and Alex Yakovlev -- A Variation Tolerant Architecture for Ultra Low Power Multi-processor Cluster 32 -- Daniele Bortolotti, Davide Rossi, Andrea Bartolini and Luca Benini -- A learning tool MOSFET model - A stepping-stone from the square-law model to BSIM4. 39 -- Kjell Jeppson -- Towards Cross Abstraction Level Power Closure -- The Semantic of the Power Intent Format UPF: Consistent Power Modelling from -- System Level to Implementation 45 -- Juergen Karmann and Wolfgang Ecker -- Enabling Energy-Aware Design Decisions for Behavioural Descriptions Containing -- Black-Box IP-Components 51 -- Lars Kosmann, Daniel Lorenz, Axel Reimer and Wolfgang Nebel -- Power Contracts: A Formal Way Towards Power-Closure?! 59 -- Gregor Nitsche, Kim Gruettner and Wolfgang Nebel -- i -- Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2013 Table of Contents -- Formal System-on-Chip Verification: An Operation-Based Methodology and its -- Perspectives in Low Power Design 67 -- Joakim Urdahl, Shrinidhi Udupi, Dominik Stoffel and Wolfgang Kunz -- System-level Power and Thermal Management -- Optimizing the Configuration and Control of a Novel Human-Powered Energy -- Harvesting System 75 -- Vishwa Goudar, Zhi Ren, Paul Brochu, Qibing Pei and Miodrag Potkonjak -- Power saving policies for multipurpose WBAN 83 -- Filippo Casamassima, Elisabetta Farella and Luca Benini -- Applying of Quality of Experience to System Optimisation 91 -- Sascha Bischoff, Andreas Hansson and Bashir M. Al-Hashimi -- On-line Thermal Emulation: How to speed-up your thermal controller design 99 -- Francesco Beneventi, Andrea Bartolini and Luca Benini -- Evaluating the Impact of Substrate on Power Integrity in Industrial Microcontrollers 107 -- Marco Cazzaniga, Patrice Joubert Doriol, Emmanuel Blanc, Valentino Liberali and -- Davide Pandini -- An Assessment of Software Lifecycle Energy. 112 -- Vasily G. Moshnyaga -- Microarchitectures and NoCs -- Design of Variable Latency Adder Based On Present and Transitional States Prediction . 120 -- Xinghua Yang, Fei Qiao, Chang Liu and Huazhong Yang -- SET Propagation in Micropipelines 126 -- Thomas Polzer and Andreas Steininger -- Evaluation of Hop Count Advantages of Network-Coded 2D-Mesh NoCs 134 -- Michael Vonbun, Stefan Wallentowitz, Michael Feilen, Walter Stechele and Andreas -- Herkersdorf -- Compiling for Performance and Power Efficiency 142 -- Ewerton Daniel de Lima, Tiago Cariolano de Souza Xavier, Anderson Faustino da -- Silva and Linnyer Beatryz Ruiz -- Circuit Monitoring and Characterization -- Reliability Monitoring of Digital Circuits by in situ Timing Measurement 150 -- Nasim Pour Aryan, Georg Georgakos and Doris Schmitt-Landsiedel -- A Single Built-in Sensor to Check Pull-up and Pull-down CMOS Networks against -- Transient Faults 157 -- R. Possamai Bastos, F. Sill Torres, J.-M. Dutertre, M.-L. Flottes, G. Di Natale, -- B. Rouzeyre -- Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2013 Table of Contents -- Metastability Characterization for Muller C-Elements 164 -- Thomas Polzer and Andreas Steininger -- Simulation and Modeling -- Efficient Power Intent Validation Using Loosely-Timed Simulation Models 172 -- Fabian Mischkalla and Wolfgang Mueller -- An Efficient Eye-Diagram Determination Technique for Multi-Coupled Interconnect Lines 185 -- Junghyun Lee and Yungseon Eo -- Fast and Accurate Power Annotated Simulation: Application to a Many-Core -- Architecture 191 -- Thomas Ducroux, Germain Haugou, Vincent Risson and Pascal Vivet -- Dynamic Voltage and Frequency Scaling -- Methodology for Power Mode Selection in FD-SOI circuits with DVFS and Dynamic -- Body Biasing 199 -- Y. Akgul, D. Puschini, S. Lesecq, E. Beigne, P. Benoit and L. Torres -- Coupled Voltage and Frequency Control for DVFS Management 207 -- M. Altieri, W. Lombardi, D. Puschini and S. Lesecq -- Crown Scheduling: Energy-Efficient Resource Allocation, Mapping and Discrete -- Frequency Scaling for Collections of Malleable Streaming Tasks. 215 -- Christoph W. Kessler, Nicolas Melot, Patrick Eitschberger and J¨org Keller -- Low Power Design Methods in Emerging Technologies -- Power Modeling and Characterization of Graphene-Based Logic Gates 223 -- Sandeep Miryala, Andrea Calimera, Enrico Macii and Massimo Poncino -- Dynamic Electrothermal Macromodeling Techniques for Thermal-Aware Design of -- Circuits and Systems 227 -- A. Magnani, V. d'Alessandro, N. Rinaldi, M. de Magistris and K. Aufinger -- Adaptive Routing and Dynamic Frequency Scaling for NoC Power-Performance -- Optimizations . 231 -- Davide Zoni, Jos´e Flich and William Fornaciari -- Poster Session -- Power Consumption Analysis Using Multi-View Modeling 235 -- Carlos Gomez, Julien DeAntoni and Fr´ed´eric Mallet -- A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection 239 -- Alessandro Sassone, Massimo Petricca, Massimo Poncino and Enrico Macii -- Automatic Implementation of Low-Complexity QC-LDPC Encoders 243 -- Georgios Tzimpragos, Christoforos Kachris, Dimitrios Soudris and Ioannis Tomkos -- Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2013 Table of Contents -- High Level Transforms to Reduce Energy Consumption of Signal and Image Processing -- Operators 247 -- H. Ye, L. Lacassagne, J. Falcou, D. Etiemble, L. Cabaret and O. Florent -- Peak Power Demand Analysis and Reduction by Using Battery Buffers for Monotonic -- Controllers 255 -- Waqaas Munawar and Jian-Jia Chen -- Design Methodology for Low-Power Embedded Microprocessors 259 -- Andrea Manuzzato, Fabio Campi, Valentino Liberali and Davide Pandini -- A Framework with Temperature-Aware Accuracy Levels for Battery Modeling from -- Datasheets 265 -- Massimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii and -- Massimo Poncino.
Altri titoli varianti	2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation Power and Timing Modeling, Optimization and Simulation
Record Nr.	UNISA-996279782803316

Pubbl/distr/stampa	Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2014
Descrizione fisica	1 online resource (68 pages)
Disciplina	621.381548
Soggetto topico	Integrated circuits - Testing Automatic test equipment Electronic digital computers - Circuits - Testing
ISBN	1-4799-3415-1
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Record Nr.	UNINA-9910134811503321

Pubbl/distr/stampa	Piscataway, NJ : , : IEEE, , 2017
Descrizione fisica	1 online resource (37 pages)
Disciplina	621.381548
Soggetto topico	Integrated circuits - Testing
ISBN	1-5386-3377-9
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Altri titoli varianti	2017 7th International Conference on Integrated Circuits, Design, and Verification
Record Nr.	UNISA-996280872503316