Design methodology for RF CMOS phase lock loops / / Carlos Quemada, Guillermo Bistue, Inigo Adin |
Autore | Quemada Carlos |
Edizione | [1st ed.] |
Pubbl/distr/stampa | Boston ; ; London, : Artech House, c2009 |
Descrizione fisica | 1 online resource (242 p.) |
Disciplina | 621.3815/364 |
Altri autori (Persone) |
AdinIInigoigo
BistueGuillermo |
Collana | Artech House microwave library |
Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
ISBN | 1-59693-384-4 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
Record Nr. | UNINA-9910819953603321 |
Quemada Carlos
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Boston ; ; London, : Artech House, c2009 | ||
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Lo trovi qui: Univ. Federico II | ||
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Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin |
Autore | Quemada Carlos |
Pubbl/distr/stampa | Boston : , : Artech House, , ©2009 |
Descrizione fisica | 1 online resource (242 p.) |
Disciplina | 621.3815/364 |
Altri autori (Persone) |
BistuéGuillermo
AdinIänigo |
Collana | Artech House microwave library |
Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
Soggetto genere / forma | Electronic books. |
ISBN | 1-59693-384-4 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
Record Nr. | UNINA-9910455172203321 |
Quemada Carlos
![]() |
||
Boston : , : Artech House, , ©2009 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|
Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin |
Autore | Quemada Carlos |
Pubbl/distr/stampa | Boston : , : Artech House, , ©2009 |
Descrizione fisica | 1 online resource (242 p.) |
Disciplina | 621.3815/364 |
Altri autori (Persone) |
BistuéGuillermo
AdinIänigo |
Collana | Artech House microwave library |
Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
ISBN | 1-59693-384-4 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
Record Nr. | UNINA-9910778002203321 |
Quemada Carlos
![]() |
||
Boston : , : Artech House, , ©2009 | ||
![]() | ||
Lo trovi qui: Univ. Federico II | ||
|