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In-Memory Computing : Synthesis and Optimization / / by Saeideh Shirinzadeh, Rolf Drechsler
| In-Memory Computing : Synthesis and Optimization / / by Saeideh Shirinzadeh, Rolf Drechsler |
| Autore | Shirinzadeh Saeideh |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (121 pages) : illustrations |
| Disciplina | 004.5 |
| Soggetto topico |
Electronic circuits
Microprocessors Electronics Microelectronics Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation |
| ISBN | 3-030-18026-3 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1: Introduction -- Chapter 2: Background -- Chapter 3: BDD Optimization and Approximation: A Multi-Criteria Approach -- Chapter 4: Synthesis for Logic-in-Memory Computing using RRAM -- Chapter 5: Compilation and Wear Le0veling for Programmable Logic-in-Memory (PLiM) Architecture -- Chapter 6: Conclusions. |
| Record Nr. | UNINA-9910366590403321 |
Shirinzadeh Saeideh
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| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Information Storage [[electronic resource] ] : A Multidisciplinary Perspective / / edited by Cornelia S. Große, Rolf Drechsler
| Information Storage [[electronic resource] ] : A Multidisciplinary Perspective / / edited by Cornelia S. Große, Rolf Drechsler |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (XV, 238 p. 85 illus., 47 illus. in color.) |
| Disciplina | 006.3 |
| Soggetto topico |
Artificial intelligence
Control engineering Robotics Mechatronics Application software Microprocessors Artificial Intelligence Control, Robotics, Mechatronics Computer Appl. in Arts and Humanities Processor Architectures |
| ISBN | 3-030-19262-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Information Processing and Storage in the Brain -- Verbal Short-Term Memory: Insights into Human Information Storage -- In-Memory Computing: The Integration of Storage and Processing -- Approximate Memory: Data Storage in the Context of Approximate Computing -- Information System for Storage, Management and Usage for Embodied Intelligent Systems -- On ‘Storing Information' in Families: (Mediated) Family Memory at the Intersection of Individual and Collective Remembering -- Cultural Memory and Screen Culture: How Television and Cross-media Productions Contribute to Cultural Memory -- The Complicated Preservation of the Television Heritage in a Digital Era. |
| Record Nr. | UNISA-996465370903316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Information Storage : A Multidisciplinary Perspective / / edited by Cornelia S. Große, Rolf Drechsler
| Information Storage : A Multidisciplinary Perspective / / edited by Cornelia S. Große, Rolf Drechsler |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (XV, 238 p. 85 illus., 47 illus. in color.) |
| Disciplina | 006.3 |
| Soggetto topico |
Artificial intelligence
Control engineering Robotics Mechatronics Application software Microprocessors Artificial Intelligence Control, Robotics, Mechatronics Computer Appl. in Arts and Humanities Processor Architectures |
| ISBN | 3-030-19262-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Information Processing and Storage in the Brain -- Verbal Short-Term Memory: Insights into Human Information Storage -- In-Memory Computing: The Integration of Storage and Processing -- Approximate Memory: Data Storage in the Context of Approximate Computing -- Information System for Storage, Management and Usage for Embodied Intelligent Systems -- On ‘Storing Information' in Families: (Mediated) Family Memory at the Intersection of Individual and Collective Remembering -- Cultural Memory and Screen Culture: How Television and Cross-media Productions Contribute to Cultural Memory -- The Complicated Preservation of the Television Heritage in a Digital Era. |
| Record Nr. | UNINA-9910366655303321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Languages, Design Methods, and Tools for Electronic System Design : Selected Contributions from FDL 2015 / / edited by Rolf Drechsler, Robert Wille
| Languages, Design Methods, and Tools for Electronic System Design : Selected Contributions from FDL 2015 / / edited by Rolf Drechsler, Robert Wille |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (193 p.) |
| Disciplina | 004.0151 |
| Collana | Lecture Notes in Electrical Engineering |
| Soggetto topico |
Electronic circuits
Microprocessors Electronics Microelectronics Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation |
| ISBN | 3-319-31723-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Virtual Hardware-In-The-Loop Co-Simulation for Multi-Domain Automotive Systems via the Functional Mock-Up Interface -- Standard Compliant Co-Simulation Models for Verification of Automotive Embedded Systems -- Building a Dynamically Reconfigurable System Through a High-Level Development Flow -- A Special-Purpose Language for Implementing Pipelined FPGA-based Accelerators -- Enabler-Based Synchronizer Model for Clock Domain Crossing Static Verification -- Temporal Decoupling with Error-Bounded Predictive Quantum Control -- Conservative Behavioural Modelling in SystemC-AMS -- Modeling Power Consumption at System-Level for Design of Power Integrity-Aware AMS-Circuits. |
| Record Nr. | UNINA-9910254223803321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Natural Language Processing for Electronic Design Automation [[electronic resource] /] / edited by Mathias Soeken, Rolf Drechsler
| Natural Language Processing for Electronic Design Automation [[electronic resource] /] / edited by Mathias Soeken, Rolf Drechsler |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (115 pages) |
| Disciplina | 006.35 |
| Soggetto topico |
Physics
Electronic circuits Electronics Microelectronics Computer-aided engineering Applied and Technical Physics Circuits and Systems Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design |
| ISBN | 3-030-52273-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1. (Semi-)Automatic Translation of Legal Regulations to Formal Representations: Expanding the Horizon of EDA Applications -- Chapter 2. Semi-Formalization of Requirements for Analog/Mixed-Signal Products with Application in Automotive Domain -- Chapter 3. Generation of Verification Artifacts from Natural Language Descriptions -- Chapter 4. Real-world Events Discovering with TWIST. |
| Record Nr. | UNISA-996418434503316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Natural Language Processing for Electronic Design Automation / / edited by Mathias Soeken, Rolf Drechsler
| Natural Language Processing for Electronic Design Automation / / edited by Mathias Soeken, Rolf Drechsler |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (115 pages) |
| Disciplina | 006.35 |
| Soggetto topico |
Physics
Electronic circuits Electronics Microelectronics Computer-aided engineering Applied and Technical Physics Circuits and Systems Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design |
| ISBN | 3-030-52273-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1. (Semi-)Automatic Translation of Legal Regulations to Formal Representations: Expanding the Horizon of EDA Applications -- Chapter 2. Semi-Formalization of Requirements for Analog/Mixed-Signal Products with Application in Automotive Domain -- Chapter 3. Generation of Verification Artifacts from Natural Language Descriptions -- Chapter 4. Real-world Events Discovering with TWIST. |
| Record Nr. | UNINA-9910427689303321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Recent findings in Boolean techniques : selected papers from the 14th International Workshop on Boolean Problems / / Rolf Drechsler, Daniel Grosse, editors
| Recent findings in Boolean techniques : selected papers from the 14th International Workshop on Boolean Problems / / Rolf Drechsler, Daniel Grosse, editors |
| Pubbl/distr/stampa | Cham, Switzerland : , : Springer, , [2021] |
| Descrizione fisica | 1 online resource (198 pages) |
| Disciplina | 511.324 |
| Soggetto topico | Algebra, Boolean |
| ISBN | 3-030-68071-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Intro -- Preface -- Contents -- Formal Verification of Integer Multiplier Circuits Using Algebraic Reasoning: A Survey -- 1 Introduction -- 2 Circuit Verification Using Computer Algebra -- 2.1 Multiplier Circuits -- 2.2 Algebra -- 2.3 Circuit Verification Using Computer Algebra -- 2.4 Algebraic Proof Systems -- 3 Verification Tools -- 3.1 Algebraic RewriTing in ABC CiesielskiYuBrownLiuRossi-DAC15,YuBrownLiuRossiCieslieski-TCAD16,YuCiesielskiMishchenko-TCAD17,CiesielskiSuYasinYu-TCAD19 -- 3.2 AMulet KaufmannBiereKauers-FMCAD19 -- 3.3 PolyCleaner MahzoonGrosseDrechsler-ICCAD18 -- 3.4 RevSCA/RevSCA-2.0 MahzoonGrosseDrechsler-DAC19 -- 3.5 DyPoSub MahzoonGrosseSchollDrechsler-DATE20 -- 4 Benchmark Generators -- 4.1 Arithmetic Module Generator -- 4.2 GenMul -- 4.3 MultGen -- 4.4 EPFL Combinational Benchmark Suite -- 4.5 ABC/Boolector -- 4.6 Processing Verilog Benchmarks -- 4.7 Optimizing Benchmarks -- 5 Evaluation -- 5.1 Arithmetic Module Generator -- 5.2 GenMul -- 5.3 MultGen -- 5.4 EPFL Combinational Benchmark Suite -- 5.5 ABC/Boolector -- 5.6 Optimized Benchmarks -- 5.7 Proof Generation -- 6 Conclusion -- References -- The Vital Role of Machine Learning in Developing Emerging Technologies -- 1 Introduction -- 1.1 Machine Learning Transistor Model -- 1.2 Machine Learning Standard Cell Model -- 2 Related Work -- 3 Background -- 3.1 Compact Models -- 3.2 Negative Capacitance FinFET -- 3.3 Transistor Characteristics -- 4 Our Machine Learning Transistor Model -- 4.1 Experimental Setup -- 4.2 Data Scaling -- 4.3 Advantages of NN-Based Transistor Modeling -- 4.4 Disadvantages of NN-Based Transistor Modeling -- 4.5 Inference Accuracy and Training Time -- 4.6 Traditional Fitness Compared to Transistor Metric Fitness -- 4.7 Early Evaluation with Limited Data -- 4.8 Modeling NC-FinFET with NN-Based Transistor Models.
5 Our Proposed Machine Learning-Based Approach -- 5.1 ML for Library Characterization -- 5.1.1 Generation of Training Data -- 5.1.2 Training of ML Estimators -- 5.2 Design Technology Co-Optimization for NC-FinFET -- 6 Evaluation and Experimental Results -- 6.1 Accuracy of Cell Library Prediction -- 6.2 Accuracy of Prediction on System Level -- 6.3 DTCO Parameter Optimization -- 6.4 Improvement in Performance -- 7 Conclusion -- References -- Fast Optimal Synthesis of Symmetric Index Generation Functions -- 1 Introduction -- 2 Preliminaries -- 3 Linearity, Orthogonality, and Circuit Structures -- 4 The Task to Solve and the Used Approach -- 5 Analysis of the Properties of the Reverse Task -- 5.1 Trivial Solution for t=1 -- 5.2 Smallest Optimal Circuits L for a Fixed Value of t -- 5.3 Regions of Restrictions -- 5.4 Repeated Use of the Smallest Optimal Circuits -- 5.5 Missing Values nmax for Odd Values of t -- 5.6 Missing Values nmax for Even Values of t -- 5.7 Summary of the Analysis -- 6 Algorithms to Compute pmin and nmax -- 7 Experimental Results -- 8 Conclusion and Future Work -- References -- Axiomatizing Boolean Differentiation -- 1 Introduction -- 1.1 Our Approach -- 1.2 Applications of Axiomatizing Boolean Differentiation -- 1.3 Outline -- 2 Model-Theoretic Fundamentals -- 3 Axiomatizing=3=3= Boolean Differentiation -- 3.1 Boolean Functions, Rings, and Derivations -- 3.2 A Complete Axiomatization -- 4 Relationship to Finite Models and Immediate Consequences -- 5 Future Applications and Perspectives -- References -- Construction of Binary Bent Functions by FFT-Like Permutation Algorithms -- 1 Introduction -- 2 Walsh Transform -- 3 Spectral Invariant Operations in the Walsh Domain -- 4 Bent Functions and Walsh Transform -- 5 Essence of FFT -- 6 Permutation Matrices -- 7 Illustrative Examples -- 8 Algorithm for Constructing Bent Functions. 9 Closing Remarks -- References -- Nonlinear Codes for Test Patterns Compression: The Old School Way -- 1 Introduction -- 2 Proposed Approach -- 2.1 Expander Outputs as a Clique Cover Problem -- 2.2 Compatibility Graph Properties -- 2.3 Techniques for Minimum Clique Cover -- 2.4 Expander Input as an MV-Encoding Problem -- 2.5 Method Summary -- 3 Results -- 3.1 Implementation -- 3.2 Resulting Codes -- 3.3 Is Optimum MV Encoding Important? -- 3.4 Expander Synthesis -- 4 Future Directions -- 5 Conclusions -- References -- Translation Techniques for Reversible Circuit Synthesis with Positive and Negative Controls -- 1 Introduction -- 2 Background -- 2.1 Reversible Functions, Gates, and Circuits -- 2.2 Quantum Gates and Circuits -- 3 Function Translations -- 3.1 Function Inverse -- 3.2 Input-Output Negation -- 3.3 Input-Output Permutation -- 4 Transformation-Based Synthesis -- 5 Simplifying a Reversible Circuit -- 6 Mapping a Reversible Circuit to a Quantum Circuit -- 6.1 Negative Control CNOTs -- 6.2 NCV Realization of MPMCT Gates -- 6.3 MPP and MPIP Gate Cost and Substitution -- 6.4 Overall Simplification and Mapping Strategy -- 7 Experimental Results -- 8 Heuristic Selection of Function Translations -- 9 Discussion and Future Work -- References -- Hybrid Control of Toffoli and Peres Gates -- 1 Introduction -- 2 Hybrid-Controlled Gates -- 3 Scalability -- 4 Closing Remark -- References -- GenMul: Generating Architecturally Complex Multipliers to Challenge Formal Verification Tools -- 1 Introduction -- 2 Preliminaries -- 2.1 Multiplier Architectures -- 2.2 SCA Basics -- 2.3 SCA-Based Verification -- 3 Multiplier Generator GenMul -- 3.1 Overview and Data Structures -- 3.2 Generation of Multipliers -- 4 Challenges of Verifying Multipliers -- 5 Conclusion -- Appendix -- GenMulWebsite -- References -- Index. |
| Record Nr. | UNINA-9910484017803321 |
| Cham, Switzerland : , : Springer, , [2021] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Reversible and Quantum Circuits : Optimization and Complexity Analysis / / by Nabila Abdessaied, Rolf Drechsler
| Reversible and Quantum Circuits : Optimization and Complexity Analysis / / by Nabila Abdessaied, Rolf Drechsler |
| Autore | Abdessaied Nabila |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (XXII, 186 p. 105 illus., 3 illus. in color.) |
| Disciplina | 621.3815 |
| Soggetto topico |
Electronic circuits
Microprocessors Electronics Microelectronics Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation |
| ISBN | 3-319-31937-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1 Introduction -- Chapter 2 Background -- Chapter 3 Optimizations and Complexity Analysis on the Reversible Level -- Chapter 4 Optimization and Complexity Analysis on the Mapping Level -- Chapter 5 Optimizations and Complexity Analysis on the Quantum Level -- Chapter 6 Conclusions. |
| Record Nr. | UNINA-9910254218603321 |
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Abdessaied Nabila
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| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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