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Advances in VLSI and embedded systems : select proceedings of AVES 2021 / / Anand D. Darji [and three others], editors



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Titolo: Advances in VLSI and embedded systems : select proceedings of AVES 2021 / / Anand D. Darji [and three others], editors Visualizza cluster
Pubblicazione: Singapore : , : Springer, , [2023]
©2023
Descrizione fisica: 1 online resource (293 pages)
Disciplina: 004.16
Soggetto topico: Embedded computer systems
Integrated circuits - Very large scale integration
Persona (resp. second.): DarjiAnand D.
Nota di bibliografia: Includes bibliographical references.
Nota di contenuto: Intro -- Preface -- Committees -- Message from General Chairs -- Contents -- About the Editors -- Modeling and Analysis of Low Power High-Speed Phase Detector and Phase Frequency Detector Using Nano Dimensional MOS Transistors at 16 nm, 22 nm, 32 nm -- 1 Introduction -- 2 Proposed Work -- 3 Simulation Waveforms and Discussions -- 4 Analysis and Discussions -- 4.1 Analysis of Phase Detector with Different Parameters -- 4.2 Analysis of PFD with Different Parameters -- 5 Comparisons with Other Works -- 6 Conclusion -- References -- Design of Low Power Modular (x mod p) Reduction Unit Based on Switching Activity for Data Security Applications -- 1 Introduction -- 2 Preliminaries -- 2.1 Static Power Dissipation -- 2.2 Dynamic Power Dissipation -- 2.3 Switching Activity -- 2.4 PDP and EDP -- 2.5 Area -- 3 1-Bit Full Adder Designs -- 4 Design of Modular Reduction Unit -- 4.1 Conventional Modular Reduction Unit (CMRU) -- 4.2 Modified Conventional Modular Reduction Unit (MCMRU) -- 4.3 Proposed Modular Reduction Unit (PMRU) -- 5 Implementation Result and Comparison of Modular Reduction Unit (MRU) Designs -- 5.1 Synthesis Results -- 5.2 Simulation Result -- 6 Conclusion -- References -- Systematic Analysis of Linearization Techniques for Wideband RF Low-Noise Amplifier -- 1 Introduction -- 2 Source of Nonlinearity in CMOS LNA -- 3 Wideband Linearization Techniques -- 3.1 Feedback -- 3.2 Feedforward -- 3.3 Complementary Derivative Superposition (CDS) -- 3.4 Noise/Distortion Cancellation -- 3.5 Post Distortion (PD) -- 3.6 Summary -- 4 Conclusion -- References -- Analysis and Modification of Low Power and High Speed 9T SRAM Cell -- 1 Introduction -- 2 Modified Circuit Description -- 2.1 Read operation -- 2.2 Write Operation -- 2.3 Hold Operation -- 3 Simulation Results and Comparison -- 4 Conclusion -- References.
Investigating the Impact of Schmitt Trigger on SRAM Cells at 32 nm Technology Node for Low Voltage Applications -- 1 Introduction -- 2 Schmitt Trigger Based Inverter -- 3 Existing Schmitt Trigger Based SRAM Bit Cells -- 4 Simulation Results -- 4.1 READ and HOLD Noise Margin Analysis -- 4.2 Dynamic Write Analysis -- 4.3 Temperature Variation Analysis -- 4.4 Leakage Current Analysis -- 5 Conclusion -- References -- Novel Approximate 4:2 Compressor for Multiplier Design -- 1 Introduction -- 2 Literature Review -- 2.1 Contribution of This Paper -- 3 Proposed Approximate Compressor and Multiplier Design -- 4 Results and Discussions -- 5 Conclusion -- References -- Approximate Computing-Based Unsigned Multipliers for Image Processing Applications -- 1 Introduction -- 2 The Conventional Compressor -- 3 The Proposed Approximate Compressor and Approximate Multiplier -- 4 Accuracy Analysis -- 5 Hardware Analysis -- 6 Application-Based Evaluation -- 7 Conclusion -- References -- A Feed-Forward Gain Enhancement Technique in a Narrow-Band Low Noise Amplifier Using Active Inductor -- 1 Introduction -- 2 Modified Cascode LNA -- 3 Analysis of the Proposed LNA -- 3.1 MCLNA Using Feed-Forward Path -- 3.2 Analysis of FFP-Based LNA Using Active Inductor -- 4 Results -- 5 Conclusion -- References -- A Fully On-Chip Tunable Impedance Matching Strategy for Maximum Power Transfer in RF Energy Harvesting Systems -- 1 Introduction -- 2 Impedance Matching Basics -- 3 Proposed Scheme -- 3.1 MOS Varactor -- 3.2 Realization -- 4 Results and Discussion -- 5 Conclusion -- References -- Design and Implementation of Fault Tolerance and Diagnosis Technique for Arithmetic Logic Unit (ALU) in Soft-Core Processor -- 1 Introduction -- 2 Fault-Tolerant Architectures -- 3 Research Work -- 3.1 Voting Logic and Disagreement -- 3.2 Diagnosis Mechanism -- 3.3 Trigger Reconfiguration of FPGA.
4 Implementation and Simulation Results -- 5 Conclusion -- References -- Pneumatic Calibrator for Heterodyne Interferometer -- 1 Introduction -- 2 Interferometer Calibration Set-Up -- 3 Calibrator Components -- 3.1 Pneumatic Actuator -- 3.2 Ultrasonic Sensor HC-SR04 -- 4 Calibration Result -- 5 Conclusion -- References -- Real-Time Object Detection and Recognition for the Visually Impaired: A YOLOv3 Approach -- 1 Introduction -- 2 Literature Survey -- 3 Methodology -- 3.1 Metrics Used in YOLOv3 Architecture -- 3.2 COCO Dataset -- 3.3 YOLOv3 Architecture -- 3.4 Requirements for Detection -- 3.5 Hyperparameter Tuning -- 4 Results and Conclusion -- References -- Design of an Autonomous Agriculture Robot for Real-Time Weed Detection Using CNN -- 1 Introduction -- 1.1 ROS for Agriculture -- 1.2 Deep Learning and Computer Vision for Agriculture -- 2 Literature Survey -- 2.1 Sensor Fusion -- 2.2 Crop-Weed Classification -- 3 System Design -- 3.1 Proposed Mechanical System Design -- 3.2 Proposed Embedded System Design -- 3.3 Modeling and Simulation of AGRIBOT -- 4 Algorithm Implementation: Path Planning and Weed Detection -- 4.1 Path Planning -- 4.2 Crop-Weed Classification -- 5 Result Analysis -- 6 Conclusion -- References -- Design and Implementation of IoT-Based System for Tracking and Monitoring of Suspected COVID-19 Patient -- 1 Introduction -- 2 Proposed Design -- 2.1 Sensor Units -- 2.2 Embedded Processing Unit -- 2.3 Alarm Units -- 2.4 Display Unit -- 2.5 Data Communication Units -- 3 Mechanism of Proposed Model -- 4 Estimated Cost of Proposed Model -- 5 Results -- 6 Advantages -- 7 Conclusion -- References -- Ambipolarity Property in Tunnel FET to Sense High Bit Rate Signals -- 1 Introduction -- 2 Methodology -- 2.1 TFET Simulation Setup and Device Calibration -- 2.2 I-V Characteristics of TFET -- 3 Results and Discussions.
3.1 Effect of Variations in RL -- 3.2 Effect of Input Rise and Fall Times (tr/f) -- 3.3 TFET Sensor Possible Applications Areas -- 4 Conclusions -- References -- Assessing Effect of Variability in Nano-Scale Futuristic On-Chip Interconnects -- 1 Introduction -- 2 Variability Analysis -- 2.1 Parametric Analysis -- 2.2 Process Corner Analysis -- 2.3 Monte Carlo Analysis -- 3 Eye Diagram Analysis -- 3.1 Driver Interconnect Load System -- 3.2 Eye Diagram Results -- 4 Conclusion -- References -- Impact of Channel Parameters on the Performance of Dielectrically Modulated JL-DG-MOSFET Biosensor -- 1 Introduction -- 2 Device Architecture and Simulation Set-Up -- 3 Design and Analysis -- 4 Conclusion -- References -- Design of a TFET-Based Temperature Invariant LDO Voltage Regulator -- 1 Introduction -- 2 Tunnel Field Effect Transistor (TFET) -- 3 Error Amplifier (EA) -- 4 Low Dropout Regulator (LDO) -- 5 Simulation Results -- 6 Conclusion -- References -- A Heuristic Algorithm for Module Placement in Digital Microfluidic Biochips -- 1 Introduction -- 2 Related Work -- 3 Module Placement in DMFBs -- 3.1 Problem Definition -- 3.2 Objectives -- 3.3 Input -- 4 Proposed Module Placement Algorithm for DMFBs -- 4.1 Best Position to Place Module -- 4.2 Reconfiguring Modules -- 4.3 Packing Modules -- 4.4 Placing the Module -- 5 Experimental Results -- 6 Conclusion -- References -- A Comprehensive Analysis in Recent Advances in 3D VLSI Floorplan Representations -- 1 Introduction -- 2 2D Versus 3D Floorplan Representation -- 3 Evolution of 3D Floorplan Techniques -- 4 Design Metrics for 3D Floorplan -- 4.1 Cuboid (Module/Block) -- 4.2 Mosaic Floorplan -- 4.3 Benchmark Circuits -- 4.4 Stacking in 3D Floorplan -- 4.5 White Spaces -- 4.6 Ideal Volume/Area -- 4.7 Dead Space -- 4.8 Temperature -- 5 3D Floorplan Representations and Techniques -- 5.1 3D CBL.
5.2 3D Slicing Floorplan -- 5.3 3D BSG -- 5.4 3D B*-Tree -- 5.5 T-Tree Representation -- 6 Results and Discussions -- 7 Conclusion and Future Work -- References -- Radiation Sensor Design for Mitigation of Total Ionizing Dose Effects -- 1 Introduction -- 2 Performance Metrics -- 3 Sensor Planning -- 4 Simulations and Results -- 4.1 Structural Implementation -- 4.2 Simulation Flow -- 4.3 Radiation Analyses -- 4.4 Threshold Voltage Shift -- 5 Conclusion -- References -- Adaptive Memetic Algorithm on Novel CBLSP Algorithm for O-Tree Implementation -- 1 Introduction -- 2 O-Tree Preliminaries -- 3 Code-Based Location Search and Position Algorithm -- 4 Fast Adaptive Memetic Algorithm -- 5 Analytical Results and Discussions -- 6 Conclusion and Future Work -- References.
Titolo autorizzato: Advances in VLSI and Embedded Systems  Visualizza cluster
ISBN: 981-19-6780-6
Formato: Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione: Inglese
Record Nr.: 9910633931503321
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Serie: Lecture notes in electrical engineering ; ; Volume 962.