CMOS sigma-delta converters : practical design guide / / Josâe M. de la Rosa and Rocâio del Râio

• Autore: Rosa Josâe M. de la
• Pubblicazione: Hoboken [New Jersey] : , : Wiley-Blackwell, , 2013; [Piscataqay, New Jersey] : , : IEEE Xplore, , [2013]
• Edizione: 3rd ed.
• Descrizione fisica: 1 online resource (428 p.)
• Disciplina: 621.3815/9
• Soggetto topico: Metal oxide semiconductors, Complementary - Design and construction
• Persona (resp. second.): RíoR. del
• Note generali: Description based upon print version of record.
• Nota di bibliografia: Includes bibliographical references and index.
• Nota di contenuto: List of Abbreviations xvii -- Preface xxi -- Acknowledgements xxvii -- 1 Introduction to ΣΔ Modulators: Basic Concepts and Fundamentals 1 -- 1.1 Basics of A/D Conversion 2 -- 1.2 Basics of Sigma-Delta Modulators 8 -- 1.3 Classification of ΣΔ Modulators 15 -- 1.4 Single-Loop ΣΔ Modulators 16 -- 1.5 Cascade ΣΔ Modulators 24 -- 1.6 Multibit ΣΔ Modulators 29 -- 1.7 Band-Pass ΣΔ Modulators 36 -- 1.8 Continuous-Time ΣΔ Modulators 41 -- 1.9 Summary 49 -- 2 Circuits and Errors: Systematic Analysis and Practical Design Issues 54 -- 2.1 Nonidealities in Switched-Capacitor ΣΔ Modulators 55 -- 2.2 Finite Amplifier Gain in SC-ΣΔMs 56 -- 2.3 Capacitor Mismatch in SC-ΣΔMs 60 -- 2.4 Integrator Settling Error in SC-ΣΔMs 62 -- 2.5 Circuit Noise in SC-ΣΔMs 71 -- 2.6 Clock Jitter in SC-ΣΔMs 75 -- 2.7 Sources of Distortion in SC-ΣΔMs 76 -- 2.8 Nonidealities in Continuous-Time ΣΔ Modulators 80 -- 2.9 Clock Jitter in CT-ΣΔMs 81 -- 2.10 Excess Loop Delay in CT-ΣΔMs 85 -- 2.11 Quantizer Metastability in CT-ΣΔMs 88 -- 2.12 Finite Amplifier Gain in CT-ΣΔMs 89 -- 2.13 Time-Constant Error in CT-ΣΔMs 92 -- 2.14 Finite Integrator Dynamics in CT-ΣΔMs 94 -- 2.15 Circuit Noise in CT-ΣΔMs 95 -- 2.16 Sources of Distortion in CT-ΣΔMs 97 -- 2.17 Case Study: High-Level Sizing of a ΣΔM 99 -- 2.18 Summary 107 -- 3 Behavioral Modeling and High-Level Simulation 110 -- 3.1 Systematic Design Methodology of ΣΔ Modulators 110 -- 3.2 Simulation Approaches for the High-Level Evaluation of ΣΔMs 113 -- 3.3 Implementing ΣΔM Behavioral Models 118 -- 3.4 Efficient Behavioral Modeling of ΣΔM Building Blocks using C-MEX S-Functions 134 -- 3.5 SIMSIDES: A SIMULINK-Based Behavioral Simulator for ΣΔMs 159 -- 3.6 Using SIMSIDES for the High-Level Sizing and Verification of ΣΔMs 167 -- 3.7 Summary 183 -- 4 Circuit-Level Design, Implementation, and Verification 186 -- 4.1 Macromodeling ΣΔMs 186 -- 4.2 Including Noise in Transient Electrical Simulations of ΣΔMs 199 -- 4.3 Processing ΣΔM Output Results of Electrical Simulations 208. ; 4.4 Design Considerations and Simulation Test Benches of ΣΔM Basic Building Blocks 213 -- 4.5 Auxiliary ΣΔM Building Blocks 250 -- 4.6 Layout Design, Floorplanning, and Practical Issues 257 -- 4.7 Chip Package, Test PCB, and Experimental Set-Up 263 -- 4.8 Summary 270 -- 5 Frontiers of ΣΔ Modulators: Trends and Challenges 273 -- 5.1 Overview of the State of the Art on ΣΔMs 274 -- 5.2 Empirical and Statistical Analysis of State-of-the-Art ΣΔMs 291 -- 5.3 Cutting-Edge ΣΔM Architectures and Techniques 300 -- 5.4 Classification of State-of-the-Art References 319 -- 5.5 Summary 319 -- A SIMSIDES User Guide 334 -- A.1 Getting Started: Installing and Running SIMSIDES 334 -- A.2 Building and Editing ΣΔM Architectures in SIMSIDES 335 -- A.3 Analyzing ΣΔMs in SIMSIDES 337 -- A.4 Example 345 -- A.5 Getting Help 354 -- B SIMSIDES Block Libraries and Models 355 -- B.1 Overview of SIMSIDES Libraries 355 -- B.2 Ideal Libraries 355 -- B.3 Real SC Building-Block Libraries 361 -- B.4 Real SI Building-Block Libraries 364 -- B.5 Real CT Building-Block Libraries 371 -- B.6 Real Quantizers and Comparators 382 -- B.7 Real D/A Converters 382 -- B.8 Auxiliary Blocks 384 -- Index 389.
• Sommario/riassunto: This book offers a timely practical design guide and comprehensive description of Sigma-Delta Modulators (ΣΔMs). With emphasis on the most important design issues and the multiple trade-offs involved in the whole design flow from specifications to chip implementation and characterization, it compiles the enormous number of technical and research works reported to date on the topic of ΣΔMs, and presents the results of such a compilation in a didactical, pedagogical, and intuitive style. Various design methodologies and practical considerations are described with a top-down approach, presenting from theoretical fundamentals, system-level design equations and behavioral models in MATLAB/SIMULINK, to circuit, transistor-level realization in Cadence Design FrameWork II, and physical implementation, chip prototyping and experimental characterization.Other key features: . a comprehensive and systematic description of ΣΔM architectures from the basic operating principles to state-of-the-art advances in architectures and circuits, and considering both switched-capacitor and continuous-time circuit implementations. a detailed review of state-of-the-art ΣΔM ICs, extracting statistical and empirical design guidelines, identifying trends, design challenges and solutions. case studies showing the different stages of the design flow of ΣΔMs. a complete description of SIMSIDES (SIMulink Sigma-Delta Simulator), a time-domain behavioral simulator for the high-level sizing and verification of ΣΔMs, implemented in MATLAB/SIMULINK. a number of electronic resources (available through a companion website) including practical examples using SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and simulation test benchesUsing a pedagogical and intuitive approach, this is an essential guide for designers of mixed-signal circuits in nanometer CMOS. It doubly serves as a self-contained reference for researchers, designers and non-experienced engineers wanting to acquire an insight into ΣΔMs and for undergraduate and graduate students in electronics engineering.
• Titolo autorizzato: CMOS sigma-delta converters
• ISBN: 1-118-56843-5; 1-299-27753-5; 1-118-56922-9
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 9910139233103321
• Lo trovi qui: Univ. Federico II
• Serie: Wiley - IEEE