System level ESD co-design / / edited by Charvaka Duvvury, Harald Gossner

• Pubblicazione: West Sussex, England : , : Wiley-IEEE Press, , 2015; ©2015
• Descrizione fisica: 1 online resource (533 p.)
• Disciplina: 537/.2
• Soggetto topico: Shielding (Electricity); Electronic apparatus and appliances - Design and construction; Integrated circuits - Design and construction; Integrated circuits - Protection; Electrostatics; Static eliminators
• Classificazione: TEC031000
• Persona (resp. second.): DuvvuryCharvaka; GossnerHarald
• Note generali: Description based upon print version of record.
• Nota di bibliografia: Includes bibliographical references and index.
• Nota di contenuto: Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index .
• Sommario/riassunto: "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--
• Titolo autorizzato: System level ESD co-design
• ISBN: 1-118-86188-4; 1-118-86184-1; 9781118861899
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 9910807341103321
• Lo trovi qui: Univ. Federico II
• Serie: Wiley - IEEE