Compilation and synthesis for embedded reconfigurable systems : an aspect-oriented approach / / Joao Manuel Paiva Cardoso ... [et al.], editors

• Pubblicazione: New York, : Springer, 2013
• Edizione: 1st ed. 2013.
• Descrizione fisica: 1 online resource (xii, 203 pages) : illustrations (some color)
• Disciplina: 005.1
• Soggetto topico: Embedded computer systems; Architecture Analysis and Design Language
• Altri autori: CardosoJoao M. P
• Note generali: Description based upon print version of record.
• Nota di bibliografia: Includes bibliographical references and index.
• Nota di contenuto: Introduction -- The REFLECT Design-Flow -- The LARA Language -- Aspect-Based Source to Source Transformations -- Hardware/Software Compilation -- LARA Experiments -- Related Work -- Conclusions.
• Sommario/riassunto: This book provides techniques to tackle the design challenges raised by the increasing diversity and complexity of emerging, heterogeneous architectures for embedded systems. It describes an approach based on techniques from software engineering called aspect-oriented programming, which allow designers to control today’s sophisticated design tool chains, while maintaining a single application source code. Readers are introduced to the basic concepts of an aspect-oriented, domain specific language that enables control of a wide range of compilation and synthesis tools in the partitioning and mapping of an application to a heterogeneous (and possibly multi-core) target architecture. Several examples are presented that illustrate the benefits of the approach developed for applications from avionics and digital signal processing. Using the aspect-oriented programming techniques presented in this book, developers can reuse extensive sections of their designs, while preserving the original application source-code, thus promoting developer productivity as well as architecture and performance portability. · Describes an aspect-oriented approach for the compilation and synthesis of applications targeting heterogeneous embedded computing architectures; · Includes examples using an integrated tool chain for compilation and synthesis; · Provides validation and evaluation for targeted reconfigurable heterogeneous architectures; · Enables design portability, given changing target devices; · Allows developers to maintain a single application source code when targeting multiple architectures.
• Titolo autorizzato: Compilation and synthesis for embedded reconfigurable systems
• ISBN: 1-4614-4894-8
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 9910438059003321
• Lo trovi qui: Univ. Federico II