Defect and Fault-Tolerance in VLSI Systems, 1995 Workshop

• Pubblicazione: [Place of publication not identified], : IEEE Computer Society Press, 1995
• Descrizione fisica: 1 online resource (320 pages)
• Disciplina: 004.2
• Soggetto topico: Fault-tolerant computing; Integrated circuits - Very large scale integration - Design and construction
• Note generali: Bibliographic Level Mode of Issuance: Monograph
• Sommario/riassunto: An invited talk recounts Intel's experience with increasing die yield through CAD algorithms, and a panel discussion examines tools for the extracting of critical areas for a yield analysis of VLSI design. Others of the 34 papers cover critical area analysis, defect sensitivity and reliability, fault tolerant architectures and arrays, yield projection and enhancement, fault tolerant and testing techniques, and self-checking and coding techniques. No subject index. Annotation copyright by Book News, Inc., Portland, OR.
• Titolo autorizzato: Defect and Fault-Tolerance in VLSI Systems, 1995 Workshop
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 996210260003316
• Lo trovi qui: Univ. di Salerno