2005 International Symposium on System-on-Chip proceedings

• Pubblicazione: [Place of publication not identified], : IEEE, 2005
• Descrizione fisica: 1 online resource (ix, 187 pages) : illustrations
• Disciplina: 004.16
• Soggetto topico: Systems on a chip
• Note generali: Bibliographic Level Mode of Issuance: Monograph
• Nota di contenuto: Design Methodologies and CAD Tool Flows for Networks on Chips,"S. -- Network-on-Chip: A New Paradigm for System-on-Chip Design,"J. -- System-level modeling and validation increase design productivity and save errors,"B. -- Low-Power SOC Design Using Configurable Processors-The Non-Nuclear Option,"C. -- Acceleration of Modular Exponentiation on System-on-a-Programmable-Chip,"P. -- Instruction Folding for an Asynchronous Java Co-Processor,"T. -- Dynamic Verification of OCP-based SoC,"N. -- Reconfigurable Security Primitive for Embedded Systems,"G. -- A FPGA Implementation of An Open-Source Floating-Point Computation System,"C. -- Multiplierless Reconfigurable Processing Element And Its Applications to DSP Kernels,"SangKyu -- SOPC Builder, a Novel Design Methodology for IP Integration,"S. -- Proof of Concept for Low-power Digital Asynchronous IC Design,"T. -- Exploiting the Area X Performance Trade-off with Code Compression,"E. -- Application Specific Instruction Set Processor Microarchitecture for UTMS-FDD Cell Search,"K. -- Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems,"P. -- Providing Compilers and Application Program Support for Reconfigurable SoCs: Radical but Overdue,"A. -- Practical Assertion-based Formal Verification for SoC Designs,"Ping -- Static Estimation of Execution Times for Hardware Accelerators in System-on-Chips,"M. -- Design-Time Application Exploration for MP-SoC Customized Run-Time Management,"C. -- Overview of the 4S Project,"G. -- Implementing Non Power-of-Two FFTs on Coarse-Grain Reconfigurable Architectures,"A. -- Run-time Mapping of Applications to a Heterogeneous SoC,"L. -- Energy Model of Networks-on-Chip and a Bus,"P. -- SoC Leakage Power Reduction Algorithm by Input Vector Control,"Xiaotao -- ParLe - A Parallel Computing Learning Set for MPSOCs/NOCs,"M. -- Towards a Formal Power Estimation Framework for Hardware Systems,"J. -- Predictive Synchronization Scheme between Simulator And Accelerator Free from Performance Deterioration,"Jae-Gon -- An Effective IP Reuse Methodology for Quality System-on-Chip Design,"S. -- Interfacing UML 2.0 for Multiprocessor System-on-Chip Design Flow,"J. -- Architectural and Physical Design Optimizations for Efficient Intra-tile Communication,"A. -- Formal Modelling of Synchronous Hardware Components for System-on-Chip,"T. -- Rapid Refinable SoC SDR Design,"P. -- Reliable Asynchronous Links for SoC,"E. -- Analysis of System Architecture of FPGA-based Embedded Controller for Magnetically Suspended Rotor,"R. -- FPGA Prototyping: Untapping Potential within the Multimillion-Gate System-on-Chip Design Space,"A. -- Cell Library Development Methodology for Throughput Enhancement of Electron Beam Direct-Write Lithography Systems,"M. -- A Synchronization Coprocessor Architecture for WCDMA/OFDM Mobile Terminal Implementations,"L. -- Hybrid Algorithm for Mapping Static Task Graphs on Multiprocessor SoCs,"H. -- Efficiency of Leakage Reduction Techniques on Different Static Logic Styles for Embedded Portable Applications with High Standby to Active Time Ratio,"S. -- An On-Chip CDMA Communication Network,"Xin -- High-Level Switching Activity Prediction Through Sampled Monitored Simulation,"F. -- Exploitation of UML 2.0 - Based Platform Service Model and SystemC Workload Simulation in MPEG-4 Partitioning,"J. -- An OCP Compliant Network Adapter for GALS-based SoC Design Using the MANGO Network-on-Chip,"T. -- A Formal Approach to Virtualisation and Provisioning in AMBA AHB-based Reconfigurable Systems-on-Chip,"A. -- System-level Modeling of Wireless Integrated Sensor Networks,"K. -- Future Trends in SoC Interconnect,"S.
• Titolo autorizzato: 2005 International Symposium on System-on-Chip proceedings
• ISBN: 1-5090-9935-2
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 9910146818703321
• Lo trovi qui: Univ. Federico II