Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping [[electronic resource] ] : Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992. Selected Papers / / edited by Herbert Grünbacher, Reiner W. Hartenstein

• Pubblicazione: Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993
• Edizione: 1st ed. 1993.
• Descrizione fisica: 1 online resource (IX, 223 p.)
• Disciplina: 621.39/5
• Soggetto topico: Architecture, Computer; Electronic circuits; Logic design; Electronics; Microelectronics; Computer System Implementation; Circuits and Systems; Logic Design; Electronics and Microelectronics, Instrumentation
• Persona (resp. second.): GrünbacherHerbert; HartensteinReiner W
• Note generali: Bibliographic Level Mode of Issuance: Monograph
• Nota di contenuto: Overview of complex array-based PLDs -- Technologies and utilization of Field Programmable Gate Arrays -- Some considerations on Field Programmable Gate Arrays and their impact on system design -- SRAM-based FPGAs ease system verification -- MONTAGE: An FPGA for synchronous and asynchronous circuits -- ORCA: A new architecture for high-performance FPGAs -- Patching method for lookup-table type FPGA's -- Automatic one-hot re-encoding for FPGAs -- Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays -- Self-organizing Kohonen maps for FPGA placement -- High level synthesis in an FPGA-based computer aided prototyping environment -- New application of FPGAs to programmable digital communication circuits -- FPGA based logic synthesis of squarers using VHDL -- Optimized fuzzy controller architecture for field programmable gate arrays -- A real-time kernel — Rapid prototyping with VHDL and FPGAs -- JAPROC — A 8 bit micro controller design and its test environment -- Chameleon: A workstation of a different colour -- A highly parallel FPGA-based machine and its formal verification -- FPGA based self-test with deterministic test patterns -- FPGA implementation of systolic sequence alignment -- Using FPGAs to prototype a self-timed computer -- Using FPGAs to implement a reconfigurable highly parallel computer -- Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic.
• Sommario/riassunto: This book contains papers first presented at the Second International Workshop on Field-Programmable Logic and Applications (FPL '92), held in Vienna, Austria, in August-September 1992. The growing importance of field-programmable devices, especially of field-programmable gate arrays, is demonstrated by the increased number of papers submitted in 1992. Of the 70 papers submitted, 23 were selected for this book. The first three papers were invited and discuss strategic issues and give surveys. Three papers deal with new FPGA architectures and five papers introduce methods and tools. The last twelve papers report applications focusing on rapid prototyping or new FPGA-based computer architectures. The invited papersare: "Overview of complex array-based PLDs" by G. Biehl; "Technologies and utilization of field programmable gate arrays" by J. Isoaho, A. Nummela, andH. Tenhunen; and "Some considerations on field-programmable gate arrays and their impact on system design" by A. Sangiovanni-Vincentelli.
• Titolo autorizzato: Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping
• ISBN: 3-540-47902-3
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 996466153503316
• Lo trovi qui: Univ. di Salerno
• Serie: Lecture Notes in Computer Science, . 0302-9743 ; ; 705