Test Generation of Crosstalk Delay Faults in VLSI Circuits / / by S. Jayanthy, M.C. Bhuvaneswari
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| Autore: |
Jayanthy S
|
| Titolo: |
Test Generation of Crosstalk Delay Faults in VLSI Circuits / / by S. Jayanthy, M.C. Bhuvaneswari
|
| Pubblicazione: | Singapore : , : Springer Singapore : , : Imprint : Springer, , 2019 |
| Edizione: | 1st ed. 2019. |
| Descrizione fisica: | 1 online resource (161 pages) |
| Disciplina: | 621.3950287 |
| Soggetto topico: | Electronic circuits |
| Microprogramming | |
| Computer software—Reusability | |
| Logic design | |
| Circuits and Systems | |
| Control Structures and Microprogramming | |
| Performance and Reliability | |
| Logic Design | |
| Persona (resp. second.): | BhuvaneswariM.C |
| Nota di contenuto: | Chapter 1. Background and Review of Crosstalk Delay Fault Models and the Crosstalk Effects -- Chapter 2. Review of Test Generation Techniques for Crosstalk Delay Faults -- Chapter 3. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Modified PODEM and FAN Algorithm -- Chapter 4. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults using Single-Objective Genetic Algorithm -- Chapter 5. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Single-Objective Particle Swarm Optimization -- Chapter 6. Simulation of Asynchronous Sequential Circuits using Fuzzy Delay Model -- Chapter 7. Simulation Based Test Generation for Crosstalk Delay Faults in Asynchronous Sequential Circuits. |
| Sommario/riassunto: | This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing. |
| Titolo autorizzato: | Test Generation of Crosstalk Delay Faults in VLSI Circuits |
| ISBN: | 981-13-2493-X |
| Formato: | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910350312403321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |