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Titolo: |
VLSI and computer architecture / / Kenzo Watanabe, editor
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Pubblicazione: | New York, : Nova Science Publisher, c2009 |
Edizione: | 1st ed. |
Descrizione fisica: | 1 online resource (253 p.) |
Disciplina: | 621.39/5 |
Soggetto topico: | Integrated circuits - Very large scale integration - Design and construction |
Computer architecture | |
Wireless communication systems - Equipment and supplies - Design and construction | |
Microcontrollers - Design and construction | |
Altri autori: |
WatanabeKenzo
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Note generali: | Description based upon print version of record. |
Nota di bibliografia: | Includes bibliographical references and index. |
Nota di contenuto: | ""VLSI AND COMPUTERARCHITECTURE""; ""VLSI AND COMPUTER ARCHITECTURE ""; ""CONTENTS""; ""PREFACE""; ""DESIGN CONSIDERATIONS AND ALGORITHMSFOR BROADBAND FIXED WIMAX SYSTEMS""; ""Abstract""; ""1. Introduction""; ""1.1. Introduction""; ""1.2. Orthogonal Frequency Division Multiplexing (OFDM)""; ""1.2.1. Non-iterative OFDM Scheme""; ""1.2.2. Iterative OFDM Scheme""; ""1.3. SC-FDE""; ""1.4. Quantitative Results""; ""2. Time-Domain Solutions""; ""2.1. Time-Domain Turbo Equalization for SISO System""; ""2.1.1. Initial stage""; ""2.1.2. Subsequent Stages""; ""2.1.3. Complexity Comparison"" |
""2.2. Time-Domain Turbo Equalization for MIMO Systems""""2.2.1. Initial Stage""; ""2.2.2. Subsequent Stages""; ""2.3. Performance Comparison""; ""3. Conclusions""; ""References""; ""VLSI INTERCONNECTS AND THEIR DELAYPERFORMANCE""; ""Abstract""; ""1. Introduction""; ""2. Modeling Interconnect as RC & RLC Circuits""; ""2.1. Lumped and Distributed Models""; ""3. Extraction of Interconnect Parasitics""; ""4. Propagation Delay through Driver Interconnect Load Model""; ""4.1. Driver Delay Models""; ""4.2. Interconnect Delay Models""; ""4.3. Composite Driver-Interconnect-Load Model-A Case Study"" | |
""4.3.1. Effect of Short-Circuit Current on Propagation Delay""""4.3.2. Fifty Percent Propagation Delay Evaluation""; ""5. Delay Minimization Techniques""; ""6. Conclusion""; ""References""; ""DEVELOPMENT, VALIDATION AND EVALUATION OF ASPACE QUALIFIED LONG-LIFE FLIGHTCOMPUTER SERVER""; ""Abstract""; ""1. Introduction""; ""2. Single Board Microcomputers""; ""3. Fault Protections For Single Board Microcomputers""; ""3.1 Protections Against Seu Events""; ""3.2 Latch-Up Protection""; ""3.3 Other Protections""; ""4. Sqllcs Integration And Validation"" | |
""4.1 Hardware And Software Tools Developed For Sqllcs Validation""""4.2 Satellite Simulator""; ""4.3 SOFDEVO Software""; ""4.4 Earth Station Software""; ""5. Reliability Study Of Sqllcs Hardware""; ""5.1 SQLLCS Maintenance""; ""5.2 Reliability of an SQLLCS Assembled with Three SBMs""; ""5.3 Reliability for a Single SBM""; ""5.4 Reliability for a SQLLCS Assembled with Two SBMs""; ""6. Conclusion""; ""Acknowledgments""; ""References""; ""NUMERICAL SIMULATION OF QUANTUMWAVEGUIDES""; ""Abstract""; ""1. Introduction"" | |
""2. Transparent Boundary Conditions for the Two DimensionalSchrÂ?odinger Equation""""3. Discrete Transparent Boundary Conditions for the Two DimensionalSchrÂ?odinger Equation""; ""3.1. The Difference Equations""; ""3.2. Derivation of DTBCs for the Two Dimensional SchrÂ?odinger Equation""; ""3.3. Approximation of the DTBCs by Sums of Exponentials""; ""3.4. Fast Evaluation of the Discrete Convolution""; ""3.5. Implementation of the DTBCs""; ""4. Numerical Results""; ""4.1. Travelling GaussianWave Functions""; ""4.2. QuantumWaveguide Simulation""; ""Conclusion""; ""Acknowledgements"" | |
""References"" | |
Titolo autorizzato: | VLSI and computer architecture ![]() |
ISBN: | 1-61209-883-5 |
Formato: | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione: | Inglese |
Record Nr.: | 9910828333803321 |
Lo trovi qui: | Univ. Federico II |
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