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[null,null,"Titolo",null,"Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation [[electronic resource] ] : 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers / / edited by Rene van Leuken, Gilles Sicard"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2011"]
[null,null,"ISBN",null,"3-642-17752-2"]
[null,null,"Edizione",null,"[1st ed. 2011.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XII, 260 p. 130 illus., 53 illus. in color.)"]
[null,null,"Collana",null,"Theoretical Computer Science and General Issues, , 2512-2029 ; ; 6448"]
[null,null,"Disciplina",null,"004.24"]
[null,null,"Soggetti",null,"Electronic digital computers—Evaluation"]
[{"$nulls":4},"Computer simulation"]
[{"$nulls":4},"Computer networks"]
[{"$nulls":4},"Software engineering"]
[{"$nulls":4},"Computer science"]
[{"$nulls":4},"Algorithms"]
[{"$nulls":4},"System Performance and Evaluation"]
[{"$nulls":4},"Computer Modelling"]
[{"$nulls":4},"Computer Communication Networks"]
[{"$nulls":4},"Software Engineering"]
[{"$nulls":4},"Computer Science Logic and Foundations of Programming"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,null,"Sommario/riassunto","This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic."]