{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":1,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":27,"n_cols":5,"rows_kept":27,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[20,2,20,3],[21,2,21,3],[24,2,24,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNISA996465594903316"]
[null,null,"Titolo",null,"Formal Methods in Computer-Aided Design [[electronic resource] ] : First International Conference, FMCAD '96, Palo Alto, CA, USA, November 6 - 8, 1996, Proceedings / / edited by Mandayam Srivas, Albert Camilleri"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1996"]
[null,null,"ISBN",null,"3-540-49567-3"]
[null,null,"Edizione",null,"[1st ed. 1996.]"]
[null,null,"Descrizione fisica",null,"1 online resource (X, 478 p.)"]
[null,null,"Collana",null,"Lecture Notes in Computer Science, , 0302-9743 ; ; 1166"]
[null,null,"Disciplina",null,"621.39/2"]
[null,null,"Soggetti",null,"Computer-aided engineering"]
[{"$nulls":4},"Computers"]
[{"$nulls":4},"Computer engineering"]
[{"$nulls":4},"Computer hardware"]
[{"$nulls":4},"Computer logic"]
[{"$nulls":4},"Mathematical logic"]
[{"$nulls":4},"Computer-Aided Engineering (CAD, CAE) and Design"]
[{"$nulls":4},"Theory of Computation"]
[{"$nulls":4},"Computer Engineering"]
[{"$nulls":4},"Computer Hardware"]
[{"$nulls":4},"Logics and Meanings of Programs"]
[{"$nulls":4},"Mathematical Logic and Formal Languages"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,"Nota di contenuto",null,"The need for formal methods for integrated circuit design -- Verification of all circuits in a floating-point unit using word-level model checking -- *BMDs can delay the use of theorem proving for verifying arithmetic assembly instructions -- Modular verification of multipliers -- Verification of IEEE compliant subtractive division algorithms -- Hierarchical verification of two-dimensional high-speed multiplication in PVS: A case study -- Experiments in automating hardware verification using inductive proof planning -- Verifying nondeterministic implementations of deterministic systems -- A methodology for processor implementation verification -- Coverage-directed test generation using symbolic techniques -- Self-consistency "]
[{"$nulls":4},"checking -- Inverting the abstraction mapping: A methodology for hardware verification -- Validity checking for combinations of theories with equality -- A unified approach for combining different formalisms for hardware verification -- Verification using uninterpreted functions and finite instantiations -- Formal verification of the Island Tunnel Controller using Multiway Decision Graphs -- VIS -- PVS: Combining specification, proof checking, and model checking -- HOL Light: A tutorial introduction -- A tutorial on digital design derivation using DRS -- ACL2 theorems about commercial microprocessors -- Formal synthesis in circuit design — A classification and survey -- Formal specification and verification of VHDL -- Specification of control flow properties for verification of synthesized VHDL designs -- An algebraic model of correctness for superscalar microprocessors -- Mechanically checking a lemma used in an automatic verification tool -- Automatic generation of invariants in processor verification -- A brief study of BDD package performance -- Local encoding transformations for optimizing OBDD-representations of finite state machines -- Decomposition techniques for efficient ROBDD construction -- BDDs vs. Zero-Suppressed BDDs: for CTL symbolic model checking of Petri nets -- HDL-based integration of formal methods and CAD tools in the PREVAIL environment."]
[null,null,null,"Sommario/riassunto","This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing."]