{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":1,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":25,"n_cols":5,"rows_kept":25,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[18,2,18,3],[19,2,19,3],[22,2,22,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNISA996465569503316"]
[null,null,"Titolo",null,"Languages and Compilers for Parallel Computing [[electronic resource] ] : 9th International Workshop, LCPC'96, San Jose, California, USA, August 8-10, 1996, Proceedings / / edited by David Sehr, Utpal Banerjee, David Gelernter, Alex Nicolau, David Padua"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997"]
[null,null,"ISBN",null,"3-540-69128-6"]
[null,null,"Edizione",null,"[1st ed. 1997.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XIV, 618 p.)"]
[null,null,"Collana",null,"Lecture Notes in Computer Science, , 0302-9743 ; ; 1239"]
[null,null,"Disciplina",null,"005.13"]
[null,null,"Soggetti",null,"Programming languages (Electronic computers)"]
[{"$nulls":4},"Operating systems (Computers)"]
[{"$nulls":4},"Computer programming"]
[{"$nulls":4},"Computers"]
[{"$nulls":4},"Arithmetic and logic units, Computer"]
[{"$nulls":4},"Programming Languages, Compilers, Interpreters"]
[{"$nulls":4},"Operating Systems"]
[{"$nulls":4},"Programming Techniques"]
[{"$nulls":4},"Computation by Abstract Devices"]
[{"$nulls":4},"Arithmetic and Logic Structures"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,"Nota di contenuto",null,"Cross-loop reuse analysis and its application to cache optimizations -- Locality analysis for distributed shared-memory multiprocessors -- Data distribution and loop parallelization for shared-memory multiprocessors -- Data localization using loop aligned decomposition for macro-dataflow processing -- Exploiting monotone convergence functions in parallel programs -- Exact versus approximate array region analyses -- Context-sensitive interprocedural analysis in the presence of dynamic aliasing -- Initial results for glacial variable analysis -- Compiler algorithms on if-conversion, speculative predicates assignment and predicated code optimizations -- Determining asynchronous pipeline execution times -- Compiler techniques for concurrent multithreading with hardware speculation support -- Resource-Directed Loop Pipelining -- Integrating program "]
[{"$nulls":4},"optimizations and transformations with the scheduling of instruction level parallelism -- Bidirectional scheduling: A new global code scheduling approach -- Parametric computation of margins and of minimum cumulative register lifetime dates -- Global register allocation based on graph fusion -- Automatic parallelization for non-cache coherent multiprocessors -- Lock coarsening: Eliminating lock overhead in automatically parallelized object-based programs -- Are parallel workstations the right target for parallelizing compilers? -- Optimal reordering and mapping of a class of nested-loops for parallel execution -- Communication-minimal tiling of uniform dependence loops -- Communication-minimal partitioning of parallel loops and data arrays for cache-coherent distributed-memory multiprocessors -- Resource-based communication placement analysis -- Statement-level communication-free partitioning techniques for parallelizing compilers -- Generalized overlap regions for communication optimization in data-parallel programs -- Optimizing the representation of local iteration sets and access sequences for block-cyclic distributions -- Interprocedural array redistribution data-flow analysis -- HPF on fine-grain distributed shared memory: Early experience -- Simple qualitative experiments with a sparse compiler -- Factor-join: A unique approach to compiling array languages for parallel machines -- Compilation of constraint systems to procedural parallel programs -- A multithreaded substrate and compilation model for the implicitly parallel language pH -- Threads for interoperable parallel programming -- A programming environment for dynamic resource allocation and data distribution -- Dependence driven execution for data parallelism -- ?-SSA and its construction through symbolic interpretation -- Compiler support for maintaining cache coherence using data prefetching (extended abstract) -- 3D visualization of program structure and data dependence for parallelizing compilers and parallel programming -- Side effect analysis on user-defined reduction functions with dynamic pointer-linked data structures -- Estimating minimum execution time of perfect loop nests with loop-carried dependences -- Automatic data and computation partitioning on scalable shared memory multiprocessors -- The loop parallelizer LooPo—announcement -- A generalized forall concept for parallel languages -- Memory optimizations in the Intel Reference Compiler."]
[null,null,null,"Sommario/riassunto","This book presents the thoroughly refereed post-workshop proceedings of the 9th International Workshop on Languages and Compilers for Parallel Computing, LCPC'96, held in San Jose, California, in August 1996. The book contains 35 carefully revised full papers together with nine poster presentations. The papers are organized in topical sections on automatic data distribution and locality enhancement, program analysis, compiler algorithms for fine-grain parallelism, instruction scheduling and register allocation, parallelizing compilers, communication optimization, compiling HPF, and run-time control of parallelism."]