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[null,null,"Titolo",null,"High Performance Computing [[electronic resource] ] : International Symposium, ISHPC'97, Fukuoka, Japan, November 4-6, 1997, Proceedings / / edited by Constantine Polychronopoulos, Kazuki Joe, Keijiro Araki, Makoto Amamiya"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1997"]
[null,null,"ISBN",null,"3-540-69644-X"]
[null,null,"Edizione",null,"[1st ed. 1997.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XIII, 423 p.)"]
[null,null,"Collana",null,"Lecture Notes in Computer Science, , 0302-9743 ; ; 1336"]
[null,null,"Disciplina",null,"004/.35"]
[null,null,"Soggetti",null,"Computers"]
[{"$nulls":4},"Software engineering"]
[{"$nulls":4},"Computer organization"]
[{"$nulls":4},"Numerical analysis"]
[{"$nulls":4},"Theory of Computation"]
[{"$nulls":4},"Software Engineering/Programming and Operating Systems"]
[{"$nulls":4},"Computer Systems Organization and Communication Networks"]
[{"$nulls":4},"Numerical Analysis"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,"Nota di contenuto",null,"The generation of optimized codes using nonzero structure analysis -- On the importance of an end-to-end view of memory consistency in future computer systems -- High performance distributed object systems -- Instruction cache prefetching using multilevel branch prediction -- High performance wireless computing -- High-performance computing and applications in image processing and computer vision -- Present and future of HPC technologies -- Evaluation of multithreaded processors and thread-switch policies -- A multithreaded implementation concept of prolog on Datarol-II machine -- Thread Synchronization Unit (TSU): A building block for high performance computers -- Data dependence path reduction with tunneling load instructions -- Performance estimation of embedded software with pipeline and cache hazard modeling -- An implementation and evaluation of a distributed shared-memory system on workstation clusters using fast serial links -- Designing and optimizing 3-connectivity communication networks using a distributed "]
[{"$nulls":4},"genetic algorithm -- Adaptive routing on the Recursive Diagonal Torus -- Achieving multi-level parallelization -- A technique to eliminate redundant inter-processor communication on parallelizing compiler TINPAR -- An automatic vectorizing/parallelizing Pascal compiler V-Pascal ver. 3 -- An algorithm for automatic detection of loop indices for communication overlapping -- NaraView: An interactive 3D visualization system for parallelization of programs -- Hybrid approach for non-strict dataflow program on commodity machine -- Resource management methods for general purpose massively parallel OS SSS-CORE -- Scenario-based hypersequential programming: Formulation of parallelization -- Parallelization of space plasma particle simulation -- Implementing iterative solvers for irregular sparse matrix problems in high performance Fortran -- Parallel navigation in an A-NETL based parallel OODBMS -- High performance parallel FFT on distributed memory parallel computers -- Parallel computation model logPQ -- Cost estimation of coherence protocols of software managed cache on distributed shared memory system -- A portable distributed shared memory system on the cluster environment: Design and implementation fully in software -- An object-oriented framework for loop parallelization -- A method for runtime recognition of collective communication on distributed-memory multiprocessors -- Improving the performance of automated forward deduction system EnCal -- Efficiency of parallel machine for large-scale simulation in computational physics -- Parallel PDB data retriever “PDB diving booster” -- A parallelization method for neural networks with weak connection design -- Exploiting parallel computers to reduce neural network training time of real applications."]
[null,null,null,"Sommario/riassunto","This book constitutes the refereed proceedings of the International Symposium on High Performance Computing, ISHPC '97, held in Fukuoka, Japan in November 1997. The volume presents four distinguished papers and 16 revised regular papers selected from more than 40 submissions on the basis of at least three peer reviews. Also included are seven invited contributions by leading authorities and 10 selected poster presentations. The papers are organized in topical chapters on high performance systems architectures, networks, compilers, systems software, and applications in various areas."]